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This document is the ownership of EMAC, Inc. Copyright 2003.  Unauthorized duplication or copying of this document is strictly forbidden. 

 

iPac HCS12 Manual.doc 

- 7 -

 

Rev 1.2  -  11/11/03 

 

                      

 

            

2.6  Analog Channels 

 

The HC12 coprocessor on the iPac HCS12 provides two independent 10 bit 8 port A/D modules.  These modules provide 
lines ANI00 - ANI15. In addition to the A/D, the iPac HCS12 provides 2 D/A channels that are implemented by filtering two, 
8-bit hardware PWM channels PP6 & PP7. An 8 channel, 12 bit A/D and/or a 4 channel, 12 bit D/A is available optionally. 
These optional analog channels are provided through external SPI devices.  The A/D input channel except 0 – 5 Volt inputs. 
The optional 12 bit A/D in addition to the 0  – 5 Volt inputs can be jumpered using JB1 to 5  – 20 ma. All D/A channels 
provide 0 – 5 Volt outputs with a drive capability of 5 ma. 
 
 

Table 5:  ANALOG (HDR2) 

 

Pin 

Signal 

Pin 

Signal 

ANI00 

2

ANI01

ANI02 

ANI03

ANI04 

ANI05

ANI06 

ANI05

ANI08 

10 

ANI09

11 

ANI10 

12 

ANI11

13 

ANI12 

14 

ANI13

15 

ANI14 

16 

ANI15

17 

GND 

18 

GND

19 

DAC00 

20 

DAC01

21 

GND 

22 

GND

23 

DAC02 

24 

DAC03

25 

DAC04 

26 

DAC05

27 

GND 

28 

GND

29 

ANI16 

30 

ANI17

31 

ANI18 

32 

ANI19

33 

ANI20 

34 

ANI21

35 

ANI22 

36 

ANI23

37 

GND 

38 

GND

39 

5V(Vcc) 

40 

+VIN

 
 
 
In order to access the optional 12 bit A/D (LTC1290) and D/A (TLV5614) communication must take place using  HCS12’s 
SPI. Table 6 details these processor connection to both the 12 A/D and D/A. 
 
 

Table 6:  OPTIONAL A/D & D/A PORT LINE ASSIGNMENTS 

 

Processor Port Line 

Description 

Processor Port Line 

Description 

PS4 

MISI

PK3 

A/D *CS

PS5 

MOSI

PK4 

D/A *CS

PS6 

SCLK

PK5 

*LDAC

Содержание iPac HCS12

Страница 1: ...iPac HCS12 Users Manual Copyright 2003 EMAC Inc 2390 EMAC Way Carbondale IL 62902 Phone 618 529 4525 Fax 618 457 0110 http www emacinc com...

Страница 2: ...2 1 2 Options 2 1 3 Other Options 3 2 Hardware 3 2 1 Specifications 3 2 2 Jumpers 3 2 3 JTAG BDM 4 2 4 Processor Based Multi Purpose Digital I O 5 2 5 PLD Based General Purpose Digital I O 6 2 6 Analo...

Страница 3: ...ocessor running with a CPU clock speed of about 50 MHz with BDM debugger capability MEMORY 128K of internal Flash in circuit programmable 2K byte EEPROM 8K of RAM and 96 bytes of battery backed RAM DI...

Страница 4: ...ital outputs with 500 ma sink drive capability and a maximum total I O drive of 1500 ma for these 8 lines All Digital I O lines terminate to standard 50 pin I O Rack compatible header connectors ANALO...

Страница 5: ...as the channel number designated next to it 2 2 7 JB2 VIN Config This jumper block selects the iPac s input voltage requirements JB2 configures VIN to be a direct 5V connection or a 9 14V connection S...

Страница 6: ...drive 10 ma and when used as inputs the input voltage should not exceed 5 Vdc Besides being bit configurable I O lines they can also be used as PWMs and PT lines can be used as 16 bit counters For sof...

Страница 7: ...these 8 lines Table 3 PLD BASED DIGITAL I O Connector HDR1 Pin Signal Pin Signal 1 PY7 2 GND 3 PY6 4 GND 5 PY5 6 GND 7 PY4 8 GND 9 PY3 10 GND 11 PY2 12 GND 13 PY1 14 GND 15 PY0 16 GND 17 PX7 18 GND 1...

Страница 8: ...D in addition to the 0 5 Volt inputs can be jumpered using JB1 to 5 20 ma All D A channels provide 0 5 Volt outputs with a drive capability of 5 ma Table 5 ANALOG HDR2 Pin Signal Pin Signal 1 ANI00 2...

Страница 9: ...ND 6 RTS PK0 7 NC CTS PH0 8 NC RTS PK0 9 GND 10 NC 2 8 RS 232 422 485 SERIAL 1 UART The iPac HCS12 provides one jumper JP 3 selectable RS 232 422 485 UART which has software configurable baud rates Bo...

Страница 10: ...lines PM0 PM1 Jumpering JP 2 enables the terminating resistor for end of network termination Table 9 CAN HDR4 Pin Signal DB9 Description 1 NC 2 NC CANL 3 CANL GND 4 CANH 5 GND 6 NC 7 NC CANH 8 NC 9 NC...

Страница 11: ...BUS 3 PB4 DBUS 4 PK7 LCD Backlight PB5 DBUS 5 PB6 DBUS 6 PB7 DBUS 7 2 11 Keypad This header provides an interface for a 4x4 4x5 or 4x6 matrix Keypad These row and column scan lines are directly connec...

Страница 12: ...in this manner can download over the provided serial bootloader at no extra cost to the user other than the original purchase of the hardware Also optionally available is a full function Modbus clien...

Страница 13: ...and HDR3 are selectively used depending on the desired connectivity If HDR3 has the desired connectivity then use the short 50 pin ribbon cable If HDR1 connectivity is desired then the long twisted c...

Страница 14: ...16 HDR2 Pin 13 A D12 Term 6 Pin 7 HDR3 Pin 21 Port 1 5 PT5 Term 2 Pin 17 HDR2 Pin 14 A D13 Term 6 Pin 8 HDR3 Pin 23 Port 1 4 PT4 Term 2 Pin 18 HDR2 Pin 15 A D14 Term 6 Pin 9 Gnd Gnd Term 2 Pin 19 HDR2...

Страница 15: ...n 16 HDR2 Pin 13 A D12 Term 6 Pin 7 HDR1 Pin 21 Port 1 5 X5 Term 2 Pin 17 HDR2 Pin 14 A D13 Term 6 Pin 8 HDR1 Pin 23 Port 1 4 X4 Term 2 Pin 18 HDR2 Pin 15 A D14 Term 6 Pin 9 Gnd Gnd Term 2 Pin 19 HDR2...

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