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iPac HCS12 Manual.doc
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Rev 1.2 - 11/11/03
2.6 Analog Channels
The HC12 coprocessor on the iPac HCS12 provides two independent 10 bit 8 port A/D modules. These modules provide
lines ANI00 - ANI15. In addition to the A/D, the iPac HCS12 provides 2 D/A channels that are implemented by filtering two,
8-bit hardware PWM channels PP6 & PP7. An 8 channel, 12 bit A/D and/or a 4 channel, 12 bit D/A is available optionally.
These optional analog channels are provided through external SPI devices. The A/D input channel except 0 – 5 Volt inputs.
The optional 12 bit A/D in addition to the 0 – 5 Volt inputs can be jumpered using JB1 to 5 – 20 ma. All D/A channels
provide 0 – 5 Volt outputs with a drive capability of 5 ma.
Table 5: ANALOG (HDR2)
Pin
Signal
Pin
Signal
1
ANI00
2
ANI01
3
ANI02
4
ANI03
5
ANI04
6
ANI05
7
ANI06
8
ANI05
9
ANI08
10
ANI09
11
ANI10
12
ANI11
13
ANI12
14
ANI13
15
ANI14
16
ANI15
17
GND
18
GND
19
DAC00
20
DAC01
21
GND
22
GND
23
DAC02
24
DAC03
25
DAC04
26
DAC05
27
GND
28
GND
29
ANI16
30
ANI17
31
ANI18
32
ANI19
33
ANI20
34
ANI21
35
ANI22
36
ANI23
37
GND
38
GND
39
5V(Vcc)
40
+VIN
In order to access the optional 12 bit A/D (LTC1290) and D/A (TLV5614) communication must take place using HCS12’s
SPI. Table 6 details these processor connection to both the 12 A/D and D/A.
Table 6: OPTIONAL A/D & D/A PORT LINE ASSIGNMENTS
Processor Port Line
Description
Processor Port Line
Description
PS4
MISI
PK3
A/D *CS
PS5
MOSI
PK4
D/A *CS
PS6
SCLK
PK5
*LDAC