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iPac HCS12 Manual.doc
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Rev 1.2 - 11/11/03
The LCD is connected to the HCS12 processor using pseudo data bus comprised of the processor’s port lines. Table 12
defines these port line assignments. To access PLD Port X, perform a write with A0 = 0. If using an LCD with backlight
capability set PK7 high to turn on the backlight.
Table 12: PLD PSUEDO DATA BUS PORT LINE ASSIGNMENTS
Processor Port Line
Description
Processor Port Line
Description
PB0
DBUS 0
PJ0
DBUS A0
PB1
DBUS 1
PJ1
R/*W
PB2
DBUS 2
PJ6
LCD CS (E)
PB3
DBUS 3
PB4
DBUS 4
PK7
LCD Backlight
PB5
DBUS 5
PB6
DBUS 6
PB7
DBUS 7
2.11 Keypad
This header provides an interface for a 4x4,4x5, or 4x6 matrix Keypad. These row and column scan lines are directly
connected to the processor.
Table 13: KEYPAD (HDR7)
Pin
Signal
Processor Port Line
1
COL6
PM7
2
COL5
PM6
3
COL4
PM5
4
COL3
PM4
5
COL2
PM3
6
COL1
PM2
7
ROW1
PH4
8
ROW2
PH5
9
ROW 3
PH6
10
ROW 4
PH7
11
ESD SHIELD
ESD SHIELD
2.12 Real Time Clock (RTC)
The iPac HCS12 can be purchased with an optional battery backed real time clock (DS1305E). This clock is accessed using
the processors SPI port. This SPI port is shared with the optional 12-bit A/D & D/A. The processor port line assignments are
defined in Table 14.
Table 14: OPTIONAL RTC PORT LINE ASSIGNMENTS
Processor Port Line
Description
Processor Port Line
Description
PS4
MISI
PK2
RTC CS
PS5
MOSI
PS6
SCLK