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This document is the ownership of EMAC, Inc. Copyright 2003.  Unauthorized duplication or copying of this document is strictly forbidden. 

 

iPac HCS12 Manual.doc 

- 3 -

 

Rev 1.2  -  11/11/03 

 

                      

 

            

1.3  Other Options  

• 

TERMINAL BOARD:

 Screw Terminal Board allows for easy access to the iPac HCS12 I/O. Up to two Screw 

Terminal Boards can be stacked onto a single iPac HCS12.  

2.  Hardware 

 

2.1  Specifications 

 

§ 

VOLTAGE REQUIREMENTS: 

Onboard regulation allows 5 volt or 7.5 - 15 volt DC board input voltage.  

§ 

CURRENT REQUIREMENTS:

 120 ma. @ 5 Volts Typical  

§ 

OPERATING TEMPERATURE:

 0 - 70 degrees Centigrade, humidity range without condensation 0% to 90% 

RH.  

§ 

DIGITAL I/O: 

16 programmable General Purpose TTL level I/O lines with an output drive capability of 10 ma. 8 

Multipurpose TTL level I/O lines with an output drive capability of 10 ma. and a maximum total I/O drive of 50 ma. 
for these 24 lines. These lines can also be configured as Counters inputs and PWM outputs. 8 dedicated Digital 
Inputs and 8 dedicated Digital Outputs with 25 ma. drive capability. 8 open collector High-Drive Digital outputs 
with 500 ma. sink drive capability and a maximum total I/O drive of 1500 ma. for these 8 lines. All Digital I/O lines 
terminate to standard 50 pin, I/O Rack compatible header connectors.  

§ 

ANALOG INPUTS: 

8 analog inputs are multiplexed into a two 10-bit A/D converters with Sample & Hold for a 

total of 16 channels with a conversion time of 7 usec. The analog input voltage range for each channel is 0 - 5 Volts. 
An optional 12-bit, 8 channel A/D is available bringing the analog input total to 24 channels.  

§ 

ANALOG OUTPUTS: 

2 independent analog outputs implemented using 2 hardware 8-bit filtered PWM channels. 

The analog output voltage range for each output is 0 - 5 Volts with a drive capability of 5 ma. An optional 12-bit, 4 
channel D/A is available bringing the analog output total to 6 channels.  

 

2.2  Jumpers 

 

This section describes the Jumpers and Jumper Blocks of the iPac HCS12. 
 

2.2.3  JP1 

 

LCD Config.

 

LCD configuration jumpers. These Jumpers allow for different types of LCDs and backlight control. 

 

 

 

Jumper   AB1 

AB2 

backlight always on 

 

 

Jumper  BC1 

AB2 

port line control (PK7 – LCDBKL) of backlight through software 

 

 

Jumper  BC1 

BC2 

allows the use of certain graphic LCDs 

 

2.2.4  JP2 

 

CAN Term.

  

Place a jumper in the T position to terminate the CAN bus. 

Содержание iPac HCS12

Страница 1: ...iPac HCS12 Users Manual Copyright 2003 EMAC Inc 2390 EMAC Way Carbondale IL 62902 Phone 618 529 4525 Fax 618 457 0110 http www emacinc com...

Страница 2: ...2 1 2 Options 2 1 3 Other Options 3 2 Hardware 3 2 1 Specifications 3 2 2 Jumpers 3 2 3 JTAG BDM 4 2 4 Processor Based Multi Purpose Digital I O 5 2 5 PLD Based General Purpose Digital I O 6 2 6 Analo...

Страница 3: ...ocessor running with a CPU clock speed of about 50 MHz with BDM debugger capability MEMORY 128K of internal Flash in circuit programmable 2K byte EEPROM 8K of RAM and 96 bytes of battery backed RAM DI...

Страница 4: ...ital outputs with 500 ma sink drive capability and a maximum total I O drive of 1500 ma for these 8 lines All Digital I O lines terminate to standard 50 pin I O Rack compatible header connectors ANALO...

Страница 5: ...as the channel number designated next to it 2 2 7 JB2 VIN Config This jumper block selects the iPac s input voltage requirements JB2 configures VIN to be a direct 5V connection or a 9 14V connection S...

Страница 6: ...drive 10 ma and when used as inputs the input voltage should not exceed 5 Vdc Besides being bit configurable I O lines they can also be used as PWMs and PT lines can be used as 16 bit counters For sof...

Страница 7: ...these 8 lines Table 3 PLD BASED DIGITAL I O Connector HDR1 Pin Signal Pin Signal 1 PY7 2 GND 3 PY6 4 GND 5 PY5 6 GND 7 PY4 8 GND 9 PY3 10 GND 11 PY2 12 GND 13 PY1 14 GND 15 PY0 16 GND 17 PX7 18 GND 1...

Страница 8: ...D in addition to the 0 5 Volt inputs can be jumpered using JB1 to 5 20 ma All D A channels provide 0 5 Volt outputs with a drive capability of 5 ma Table 5 ANALOG HDR2 Pin Signal Pin Signal 1 ANI00 2...

Страница 9: ...ND 6 RTS PK0 7 NC CTS PH0 8 NC RTS PK0 9 GND 10 NC 2 8 RS 232 422 485 SERIAL 1 UART The iPac HCS12 provides one jumper JP 3 selectable RS 232 422 485 UART which has software configurable baud rates Bo...

Страница 10: ...lines PM0 PM1 Jumpering JP 2 enables the terminating resistor for end of network termination Table 9 CAN HDR4 Pin Signal DB9 Description 1 NC 2 NC CANL 3 CANL GND 4 CANH 5 GND 6 NC 7 NC CANH 8 NC 9 NC...

Страница 11: ...BUS 3 PB4 DBUS 4 PK7 LCD Backlight PB5 DBUS 5 PB6 DBUS 6 PB7 DBUS 7 2 11 Keypad This header provides an interface for a 4x4 4x5 or 4x6 matrix Keypad These row and column scan lines are directly connec...

Страница 12: ...in this manner can download over the provided serial bootloader at no extra cost to the user other than the original purchase of the hardware Also optionally available is a full function Modbus clien...

Страница 13: ...and HDR3 are selectively used depending on the desired connectivity If HDR3 has the desired connectivity then use the short 50 pin ribbon cable If HDR1 connectivity is desired then the long twisted c...

Страница 14: ...16 HDR2 Pin 13 A D12 Term 6 Pin 7 HDR3 Pin 21 Port 1 5 PT5 Term 2 Pin 17 HDR2 Pin 14 A D13 Term 6 Pin 8 HDR3 Pin 23 Port 1 4 PT4 Term 2 Pin 18 HDR2 Pin 15 A D14 Term 6 Pin 9 Gnd Gnd Term 2 Pin 19 HDR2...

Страница 15: ...n 16 HDR2 Pin 13 A D12 Term 6 Pin 7 HDR1 Pin 21 Port 1 5 X5 Term 2 Pin 17 HDR2 Pin 14 A D13 Term 6 Pin 8 HDR1 Pin 23 Port 1 4 X4 Term 2 Pin 18 HDR2 Pin 15 A D14 Term 6 Pin 9 Gnd Gnd Term 2 Pin 19 HDR2...

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