EDT PCIe Gen1 Framegrabbers, Руководство пользователя

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Camera Link PCI Express (PCIe) Gen1 Framegrabbers Appendix C: Timestamping
EDT, Inc. 2012 March 16 32
Appendix C: Timestamping
This appendix covers the timestamping function, which is provided through the optional Lemo connector on
the PCIe8 DV / DVa and the PCIe4 DVa C-Link framegrabbers.
This function enables a precise IRIG-B timestamp to be inserted, directly into the data, for each image frame
at the moment of capture. The timestamp is included in a 32-byte footer after the end of the image data; no
image data is overwritten. For example, a camera with 1000 x 1000 8-bit pixels would produce 1,000,032
bytes of DMA data.
Although the footer is at the end of the DMA data, the time is captured at the beginning of the frame on the
rising edge of the frame valid signal. The time thus captured combines the time derived from an IRIG-B input
with a high-resolution counter for computing fractional seconds.
NOTE EDT’s current IRIG-B format (IRIG2) is the second such format used for Camera Link PCIe boards.
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EDT’s former IRIG-B format (IRIG1) is now obsolete.
In addition to the IRIG time value, the footer contains a frame counter, as well as space for a 64-bit
timestamp computed as Unix seconds and fractional seconds.
For information on cable connectors and pinouts, see Additional External Inputs on page 29 .
Camera Configuration Directives
To enable the IRIG timestamp, add to a camera configuration file:
method_header_type: IRIG2
To enable packed BCD timestamps in the configuration file, use:
irig_raw: 1
To specify that this board is using input from another board rather than direct input, use:
irig_slave: 1
Footer Format
The IRIG2 footer is 32 bytes appended to the image data transferred by DMA from the PCIe8 DV / DVa C-
Link. It includes a frame counter and a timestamp from IRIG input.
Time values down to the microsecond are counted using the 40 MHz oscillator on the board. The time is
latched at the beginning of transfer from the camera when the board sees the rising edge of frame valid.
After frame capture, the time in Unix seconds is computed, including the fractional time determined by
dividing the current 40 MHz count by the number of 40 MHz clocks in a second. The IRIG time is determined
on the board as either Unix seconds, or as the IRIG BCD values packed into a 32-bit integer.
Table 8 shows the structure elements of the IRIG2 footer.
Table 8. Elements of IRIG2 Footer, part 1 of 2
Element Offset Size Type Notes
Magic 0 4 u_int This should be ASCII “EDT” followed by 01 (or 0x45445401).
Frame 4 4 u_int This is the frame counter, which is reset when reset_intfc bit is
cleared – normally at the start of acquisition.