E m b e d d e d S o l u t i o n s P g 1 4 o f 2 0
IP Module Logic Interface Pin Assignment
The figure below gives the pin assignments for the IP Module Logic Interface on the IP-
CF. Pins marked n/c below are defined by the specification, but not used on the IP-CF.
Also see the User Manual for your carrier board for more information.
GND
GND
1
26
CLK
+5V
2
27
Reset*
R/W*
3
28
D0
IDSEL*
4
29
D1
DMAReq0*
5
30
D2
MEMSEL*
6
31
D3
DMAReq1*
7
32
D4
IntSel*
8
33
D5
DMAck*
9
34
D6
IOSel*
10
35
D7
n/c
11
36
D8
A1
12
37
D9
DMAEnd*
13
38
D10
A2
14
39
D11
n/c
15
40
D12
A3
16
41
D13
IntReq0*
17
42
D14
A4
18
43
D15
IntReq1*
19
44
BS0*
A5
20
45
BS1*
n/c
21
46
n/c
A6
22
47
n/c
Ack*
23
48
+5V
n/c
24
49
GND
GND
25
50
NOTE 1: The no-connect signals above are defined by the IP Module Logic Interface Specification, but not used
by this IP. See the Specification for more information.
NOTE 2: The layout of the pin numbers in this table corresponds to the physical placement of pins on the IP
connector. Thus this table may be used to easily locate the physical pin corresponding to a desired signal. Pin 1 is
marked with a square pad on the IP Module.
FIGURE 5
IP-CF LOGIC INTERFACE
