Digital PRIORIS XL Server
Digital PRIORIS XL Server
Service Procedures
Service Procedures
MCS Logistics Engineering - Nijmegen
MCS Logistics Engineering - Nijmegen
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590 CPU Module Jumper Settings
Figure 3 - 26 shows the jumper pin locations as well as the location of the CPU module's secondary cache
memory upgrade socket (A, Figure 3 - 26).
The following table lists the factory default settings. If necessary,
refer to “Device Mapping” for memory
mapping information.
CPU Module Jumper Settings (90 MHz and higher CPUs)
Feature
Description
Setting
CPU core/bus frequency ratio
2/1 speed bus
3/2 speed bus
J4, jumpered(2)
J4, open(1)
Reserved
Factory use only
J8, jumpered(1)
J8, open
1. Factory default setting
2. For Celebris XL 5120, J4 will be jumpered.
NOTE
Earlier versions of the CPU Module did not have voltage regulator sockets as shown in
B of Figure 3 - 26.
J4
J8
A
DEC00261-2
B
Figure 3 - 26 Secondary Cache Upgrade Socket and Jumper Locations
