Chip Architecture
Fig. : Block diagram of the VCT 49xxI
XTAL1
IF
Frontend
Slicer
Video
Backend
IF
Processor
Sound
Demodulator
Audio
Processor
Display
Generator
Bus
Arbiter
20kB XRAM
256kB
Prog ROM
Clock
Generator
Reset & Test
Logic
I2C Master/
Slave
24kB
Char ROM
TEST
RESETQ
XTAL2
I2C
Pxy
CVBS in
IFIN-
IFIN+
T
A
G
C
S
IF
YCrCb in
CVBS out
RGB in
A
O
U
T
S
P
E
A
K
E
R
RGB out
SVM
RGB in
SENSE
RSW
VERT
EW
HOUT
PROT
HFLB
Panorama
Scaler
Display &
Deflection
Processor
Timer
CRT
PWM
ADC
UART
Watchdog
RTC
I/O-Ports
Memory
Interface
ADB, DB, PSENQ,
PSWEQ, WRQ, RDQ
CPU
8051
A
IN
Video
Frontend
Color
Decoder
Component
Interface
Comb
Filter