
Hercules-EBX CPU User Manual V1.02
Page 75
Base + 30
Read
Calibration Status Register
Bit
No.
7 6 5 4 3 2 1 0
Name
0
TDBUSY
EEBUSY CMUXEN
0 0 0 0
TDBUSY TrimDAC busy indicator
0
User may access TrimDAC
1
TrimDAC is being accessed or reload operation is in progress
EEBUSY EEPROM busy indicator
0
User may access EEPROM
1
EEPROM is being accessed
When either signal is 1, do not access the data and address registers at base + 12 and base +
13.
Base + 31
Write
EEPROM Access Key Register
The user must write the value 0xA5 (binary 10100101) to this register each time after setting the
PAGE bit in order to get access to the EEPROM. This helps prevent accidental corruption of the
EEPROM contents.
Base + 31
Read
FPGA Revision Code
This register may be read back to indicate the revision number of the FPGA design. The revision code
for this design is 0x40.
Содержание HERCULES-EBX HRC400-5A128
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