Diamond Systems HERCULES-EBX HRC400-5A128, Руководство пользователя, Страница: 70 / 123

Hercules-EBX CPU User Manual V1.02 Page 70
Base + 24 Read/Write Counter/Timer Data Register Byte 1
Bit No. 7 6 5 4 3 2 1 0
Name CTRD7 CTRD6 CTRD5 CTRD4 CTRD3 CTRD2 CTRD1 CTRD0
CTRD7-0 LSB for counter/timers 0 and 1
Base + 25 Read/Write Counter/Timer Data Register Byte 2
Bit No. 7 6 5 4 3 2 1 0
Name CTRD15 CTRD14 CTRD13 CTRD12 CTRD11 CTRD10 CTRD9 CTRD8
CTRD15-8 CSB (middle byte) for counter/timer 0, MSB for counter/timer 1
Base + 26 Read/Write Counter/Timer Data Register Byte 3
Bit No. 7 6 5 4 3 2 1 0
Name CTRD23 CTRD22 CTRD21 CTRD20 CTRD19 CTRD18 CTRD17 CTRD16
CTRD23-16 MSB for counter/timer 0
Counter/timer 0 is 24 bits wide and uses all three bytes. Counter/timer 1 is 16 bits wide and uses
only bytes 1 and 2. The bytes may be written and read in any order.
Base + 27 Write Counter/Timer Control Register
Bit No. 7 6 5 4 3 2 1 0
Name CTR LATCH GTDIS GTEN CTDIS CTEN LOAD CLR
CTR Counter no., 0 or 1
LATCH Latch selected counter’s current data into bytes 1-3 or 1-2 as appropriate
GTDIS Disable gating on selected counter
GTEN Enable gating on selected counter
CTDIS Disable counting on selected counter
CTEN Enable counting on selected counter
LOAD Load selected counter with data in bytes 1-3 or 1-2 as appropriate
CLR Clear selected counter to 0