Denon DN-X600, Руководство по обслуживанию, Страница: 78 / 104

78
Pin No BGA Location Pin name I/O Pol Reg Function
30 B14 AD_TRG O AD_TRG for CPU
31 B15 P_SCK. O Panel control clock
32 B16 TDO REV JTAG control reserve pin
33 C1 710_MCLK O System clock for DSP
34 C2 NC NC
35 C3 DGND DGND
36 C4 NC NC
37 C5 RELAY1 O CD/PHONO select signal L=CD, H=PHONO
38 C6 RELAY2 O CD/PHONO select signal L=CD, H=PHONO
39 C7 RELAY3 / MIC-A1 O
CD/PHONO select signal
/ MIC/AUX1 select signal L=MIC(default), H=AUX1 @X600
40 C8
4382_CSN / DAC_
CSN1
O N DAC chip select (PCM1795)
41 C9
1796_CSN / DAC_
CSN2
O N DAC chip select (AK4382)
42 C10 DIT_CDTI O DIT control data (AK4104)
43 C11 DSPINT1 O Interrupt signal for DSP
44 C12 BLINK. O Panel BLINK signal
45 C13 SC2. O Panel scan signal
46 C14 DGND DGND
47 C15 USBD_2 O USB Audio data (DSP)
48 C16 USBD_1 O USB Audio data (DSP)
49 D1 SH_RDY O N Interrupt signal for CPU
50 D2 V3FPG VCCO
51 D3 SHA6 I 10bits address bus (CPU)
52 D4 SHA2 I 10bits address bus (CPU)
53 D5 PUDC_B PU Con fi guration reserve pin
54 D6 CS7 I N Chip select (CPU)
55 D7 RELAY4 / STBY O
CD/PHONO select signal
/ STANBY ON/OFF L=OFF(default), H=ON @X600
56 D8 DAC_CDTI O DAC control data (AK4382, PCM1795)
57 D9 DAC_CCLK O DAC control clock (AK4382, PCM1795)
58 D10 A_RST O N Reset for ADC and DAC
59 D11 DSPINT2 O N Interrupt signal for DSP
60 D12 NC NC
61 D13 SC3. O Panel scan signal
62 D14 ASDQM1. I N DQM signal from DSP
63 D15 USBD_3 O USB Audio data (DSP)
64 D16 USBD_4 O USB Audio data (DSP)
65 E1 SHA10 I 10bits address bus (CPU)
66 E2 SHA7 I 10bits address bus (CPU)
67 E3 SHA5 I 10bits address bus (CPU)
68 E4 UNLCK_1 I DIR PLL unlock signal (DIR9001)
69 E5 DGND DGND
70 E6 DQMLL I N DQM signal from CPU
71 E7 DSPGPIO1 IO General Purpose Input/Output signal for DSP
72 E8 V3FPG VCCO
73 E9 NC NC
74 E10 DSPGPIO2 IO General Purpose Input/Output signal for DSP
75 E11 V3FPG VCCAUX
76 E12 DGND DGND
77 E13 ASDQM3. I N DQM signal from DSP
78 E14 ASDQM2. I N DQM signal from DSP