MVBX2-X User’s Manual
30
Chipset Features Setup
This “
Chipset Features Setup
” option controls the configuration of the board’s chipset.
Control keys for this screen are the same as for the previous screen.
Bank 0/1, 2/3, 4/5 DRAM Timing
This field allows you to set the Timing of Bank 0/1, 2/3, 4/5.
SDRAM Cycle Length
This field allows you to set the CAS latency timing to 2 or 3.
DRAM Clock
This field allows you to set DRAM Clock.
Memory Hole
In order to improve performance, certain space in memory can be reserved for ISA
cards. This memory must be mapped into the memory space below 16MB.
Read Around write
This field sets the DRAM optimization feature. If a memory read is a addressed to a
location whose latest write is being held in a buffer before being written to memory, the
read is satisfied through the buffer contents, and the read is not sent to the DRAM.
Concurrent PCI/Host
When disable, CPU bus will be occupied during the entire PCI operation period.
System BIOS Cacheable
This field allows you to cache the System BIOS for higher performance.
