Delta Tau Acc-51E, Руководство пользователя

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Accessory 51E
Hiperface Interface Option 31
Using Hiperface
Upon power-up the Hiperface interface performs a Read Position Shifted command and leaves its data in
the output registers.
Hiperface is defined as a 32-bit protocol. Therefore, in the 24-bit PMAC environment there are two sets
of 24-bit registers needed for Hiperface transactions.
Bit 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Base + 2
address
24 LSB Bits of Result
Don’t Care
Encoder Command Word
Bit 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Base + 3
address
Status Bits 8 MSB Bits of Result
The diagrams above show how the two registers are used. By placing a command into the eight LSBs of
the first register, all four encoders are commanded to respond.
Note:
All four encoders are commanded to respond when any one of the command
registers receives a command. Therefore, it is necessary to issue only one
command for all connected encoders.
Using M-variables for Hiperface (Turbo Processor Only)
When using a Turbo PMAC the Hiperface interface involves the use of three M-variables. A PLC
program should be written that implements the transactions that are used with these m-variables.
If the base address of the Acc-51E is at $78200, assign the M-variables as follows:
FLAG M-Variables
UMAC Turbo
Channel 1 M10->y:$78203,16,1
Channel 2 M20->y:$78203,17,1
Channel 3 M30->y:$78203,18,1
Channel 4 M40->y:$78203,19,1
LSB Register M-Variables
UMAC Turbo
Channel 1 M11->y:$78202,24
Channel 2 M21->y:$7820A,24
Channel 3 M31->y:$78212,24
Channel 4 M41->y:$7821A,24
MSB Register M-Variables
UMAC Turbo
Channel 1 M12->y:$78203,0,8
Channel 2 M22->y:$7820B,,08
Channel 3 M32->y:$78213,0,8
Channel 4 M42->y:$7821B,0,8
Hiperface Register Operation
The flag M-variables are set to 1 while the Hiperface interface is performing the commanded operation.
At the beginning of the commanded operation, the LSB Register is set to 000000 for the conversion.