Accessory 51E
20
Turbo UMAC and the UMAC Interpolator
The following table shows the possible entries when PMAC2-style Servo ICs are used, as in the Acc-51E:
Servo IC #
Channel 1
Channel 2
Channel 3
Channel 4
2
$FF8200
$FF8208
$FF8210
$FF8218
3
$FF8300
$FF8308
$FF8310
$FF8318
4
$FF9200
$FF9208
$FF9210
$FF9218
5
$FF9300
$FF9308
$FF9310
$FF9318
6
$FFA200
$FFA208
$FFA210
$FFA218
7
$FFA300
$FFA308
$FFA310
$FFA318
8
$FFB200
$FFB208
$FFB210
$FFB218
9
$FFB300
$FFB308
$FFB310
$FFB318
2*
$FF8220
$FF8228
$FF8230
$FF8238
3*
$FF8320
$FF8328
$FF8330
$FF8338
4*
$FF9220
$FF9228
$FF9230
$FF9238
5*
$FF9320
$FF9328
$FF9330
$FF9338
6*
$FFA220
$FFA228
$FFA230
$FFA238
7*
$FFA320
$FFA328
$FFA330
$FFA338
8*
$FFB220
$FFB228
$FFB230
$FFB238
9*
$FFB320
$FFB328
$FFB130
$FFB338
Note:
By setting the bit-19 mode switch to 1, the second hex digit changes from 7 to F.
A/D Converter Address:
The second line of the entry contains $0 in the first hex digit and the base
address of the first of two A/D converters to be read in the low 19 bits (bits 0 to 18). The second A/D
converter will be read at the next higher address. The following table shows the possible entries when
PMAC2-style Servo ICs are used, as in the Acc-51E:
Servo IC #
Channel 1
Channel 2
Channel 3
Channel 4
2
$078205
$07820D
$078215
$07821D
3
$078305
$07830D
$078315
$07831D
4
$079205
$07920D
$079215
$07921D
5
$079305
$07930D
$079315
$07931D
6
$07A205
$07A20D
$07A215
$07A21D
7
$07A305
$07A30D
$07A315
$07A31D
8
$07B205
$07B20D
$07B215
$07B21D
9
$07B305
$07B30D
$07B315
$07B31D
2*
$078225
$07822D
$078235
$07823D
3*
$078325
$07832D
$078335
$07833D
4*
$079225
$07922D
$079235
$07923D
5*
$079325
$07932D
$079335
$07933D
6*
$07A225
$07A22D
$07A235
$07A23D
7*
$07A325
$07A32D
$07A335
$07A33D
8*
$07B225
$07B22D
$07B235
$07B23D
9*
$07B325
$07B32D
$07B335
$07B33D
A/D Bias Term:
The third line of the entry contains the bias in the A/D converter values. This line
should contain the value that the A/D converters report when ideally they should report zero. Turbo
PMAC subtracts this value from both A/D readings before calculating the arctangent. Many users will
leave this value at 0, but it is particularly useful to remove the offsets of single-ended analog encoder
signals.
This line is scaled so that the maximum A/D converter reading provides the full value of the 24-bit
register (+/-2
23
, or +/-8,388,608). Generally, it is set by reading the A/D converter values directly as 24-
bit values, computing the average value over a cycle or cycles, and entering this value here.
Содержание Acc-51E
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