H A R D W A R E O P E R A T I O N
Data Device Corporation
BU-65570/2i Manual
25
message until the value of ‘last’ is reached, at which point the current
table number will rollover to the value of first. The incrementing of the
current data table is accomplished through the use of an intermessage
routine.
MONITOR MODE
The BU-65572iX contains an independent message monitor for each
bus with the ability to filter messages in real time. Monitor selection or
filtering is performed through the use of a lookup table based on the RT
address, T/R, and sub-address of command words. Monitored
messages are stored in the shared RAM on the BU-65572iX, which
allocates 6K words for the monitor stack. Each entry in the monitor stack
contains a header followed by a variable number of data words.
Contained with the message header are the receive/transmit
command(s), receive/transmit status, message format, Bus (A or B), a
capture flag, word count (actual number of words in the message), a
detected error field, and a 32-bit time tag (1 µsec resolution).
The transfer of the messages from the card’s circular buffer to the host
memory/disk is determined by the capture flag, which is set upon
detection of a predefined event as specified by the ‘ddcCaptureEvent’
(see BU-69068 manual) command. Capture events include immediate,
command template match, exception, or trigger. The command template
event is based on a 16-bit command word with a 16-bit mask. Exception
events may be programmed for any exception: invalid command, invalid
data, invalid status, gap preceding data, response time error, wrong RT
address error, status set condition or an illegal command. The trigger
event uses one of the four monitor input pins on the 25-pin D-type
connector as a trigger input.
The BU-65572iX supports DMA transfers using its PCI Bus Mastering
Mode. The Monitor mode can autonomously transfer monitored data to
host buffer without host CPU intervention. This greatly improves the
efficiency of both the host and the BU-65572iX.
INTERRUPTS
For each of the installed channels, both the BC/RT and the Monitor may
generate interrupts on a common output to the PCI back plane (#INTA).
The hardware interrupt vector used by the BU-65572iX is selected by
the Plug-and-Play capability of the PCI back plane and BIOS. An
important aspect of PCI interrupts is that they are sharable. This means
that the BU-65572iX can share an interrupt for all buses on the card and
all BU-65572iX cards in the computer.
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