
PCIe-FRM24 Users Manual (Rev 1.3)
-
9-
http://www.daqsystem.com
3.2 Description of the functional blocks
(1)
MDR-26 Connecter : J2, J4
Camera Link Base (J2), medium/Full (J4) Signal Connector
(2)
LVDS Link : U12, U15, U18
Receive Image frame
(3)
FPGA : U16
All of the board functions are controlled by the Logic program of the FPGA.
(4)
PCI Express Chipset: U8
It „s a PCI Express Bridge.
(5)
Line Trigger : J7
It is supposed to I/O circuit for external devices.
(6)
Regulator : U6, U7, U10, U11, U13, U20
This block is for supplying the power to the board.
.