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Latency delay
All Digital Signal Processing, and conversion between different formats of signal
–
analog/digital/network etc, necessarily introduce some delay (latency) to the signal path. Of course,
we strive to minimise these latencies. Small as they are, it is sometimes useful to know their precise
values. The following describes the principal latencies introduced by various parts of the SC48
product:
Input/Output Latencies
Analog Input
0.385ms
OR Digital input at 96KHz sample rate 0.5ms
OR Digital input at 48KHz sample rate 0.66ms
Analog Output 0.402ms
OR AES3 Output 0.1ms
OR Dante Output 0.5ms (TBC)
Processing Latencies (limited to a minimum of 1.53ms):
Input HiShelf FIR 0.6
ms (0ms if set to ‘Off’)
LIR Linear Phase crossover 1.19ms/Fhp(kHz), limited to 30ms maximum **
VxLim Limiter (VX mode off) 0.12ms/Fhp(kHz), limited to 1.53ms maximum **
OR VxLim Limiter (VX mode on) 0.358ms/Fsplit(kHz), limited to 1.53ms max
** This latency figure is calculated using the crossover High-pass frequency (in kHz)
This latency figure is calculated using the Vx Split frequency (in kHz)
Important tip:
The processing latency is constant at 1.53ms unless LIR crossover filters or FIR HiShelf
EQs are used, so normally you would just need to add the Input and Output delays to this constant
value.
If LIR or FIR are in use, the Processing latency of a Drive Module may increase beyond this figure. The
Drive Module Latency may be viewed on the Latency page of the relevant Input DSP channel. This
can be accessed by pressing Input then down until the latency page is reached.
When LIR, is used the Vx Limiter can take the overall latency above the 1.53ms. When high pass
frequency is set below 40Hz the filter will automatically revert to Linkwitz riley, this is set so that the
latency will not exceed 30ms as stated.
Note that the latency reported on the Latency screen in the utilities menu does not include the
Input/Output latencies.
When using input FIR filters, LIR or VX Limiters always check the view latency screen to see the
latency attributed to that Drive Module.
Содержание DNA SC48
Страница 35: ...35 Processing Block Diagram...
Страница 39: ...39 EQ and Filter Response Graphs...
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Страница 42: ...42...