1M28, 1M75, and 1M150 User’s Manual
PRELIMINARY
59
DALSA
03-32-00525-04
PROM
Address
FPGA
Register
Address
Default
Name
Description
R/W
or C
HEX
HEX
HEX
BANK4_BYTE12[1:0]
MSB start value 12 (*)
R/W
A9
3C
BANK4_BYTE13[1:0]
MSB start value 13 (*)
R/W
AA
3D
BANK4_BYTE14[1:0]
MSB start value 14 (*)
R/W
AB
3E
BANK4_BYTE15[1:0]
MSB start value 15 (*)
R/W
AC
3F
Table 26: Basic Addresses of the DAC Values for 8 Operating Modes
Basic Addresses
HEX
Extended Operating Mode
Description
400
TBD
-
420
TBD
-
440
TBD
-
460
TBD
-
480
TBD
-
4A0
TBD
-
4C0
TBD
-
4E0
TBD
-
Table 27: Assignment of the DAC Values to Storage Values
EEPROM
Address
HEX
DAC Functions and Operating Modes
Base + 00
LSB DAC0 Channel 0 Main register
Base + 01
MSB DAC0 Channel 0 Main register
Base + 02
LSB DAC0 Channel 0 Sub register
Base + 03
MSB DAC0 Channel 0 Sub register
Base + 04
LSB DAC0 Channel 1 Main register
Base + 05
MSB DAC0 Channel 1 Main register
Base + 06
LSB DAC0 Channel 1 Sub register
Base + 07
MSB DAC0 Channel 1 Sub register
Base + 08
LSB DAC0 Channel 2 Main register
Base + 09
MSB DAC0 Channel 2 Main register
Base + 0A
LSB DAC0 Channel 2 Sub register
Base + 0B
MSB DAC0 Channel 2 Sub register
Base + 0C
LSB DAC0 Channel 3 Main register
Base + 0D
MSB DAC0 Channel 3 Main register
Base + 0E
LSB DAC0 Channel 3 Sub register
Base + 0F
MSB DAC0 Channel 3 Sub register
Base + 10
LSB DAC0 Channel 4 Main register
Base + 11
MSB DAC0 Channel 4 Main register
Base + 12
LSB DAC0 Channel 4 Sub register
Base + 13
MSB DAC0 Channel 4 Sub register
Base + 14
LSB DAC0 Channel 5 Main register
Base + 15
MSB DAC0 Channel 5 Main register