Cypress S6J3110 Series Скачать руководство пользователя страница 4

 

How to Use A/D Converter for S6J3110/ S6J3120 Series 

www.cypress.com

 

Document No. 002-04457 Rev. *B 

3.4 

Configuration 

This section shows the configuration of the 12-bit A/D converter. 

 

3 . 4 . 1  

C o n f i g u r a t i o n   o f   t h e   A / D   Ac t i v a t i o n   C o m p a r e  

The configuration of the A/D activation compares shows in the following. 

 

Figure 1. Configuration of the A/D Activation Compare (n=31, A/D Converter Unit 0) 

 

 

 

Содержание S6J3110 Series

Страница 1: ...tatus Register ADRCCS 22 4 7 Upper Threshold Setting Register ADRCUT 22 4 8 Lower Threshold Setting Register ADRCLT 22 4 9 A D Software Activation Channel Selection Register ADTSE 23 4 10 A D Software Activation Register ADTSS 23 4 11 A D Data Register ADTCD 23 4 12 Range Comparison Flag Register ADRCIF 24 4 13 Range Comparison Flag Clear Register ADRCIFC 24 5 Reference 25 Document History 26 Worl...

Страница 2: ...ctivation request either single mode or repeat mode can be set for each activation channel In single mode an activation factor causes an activation request In repeat mode an activation factor causes a continuous activation request 3 1 4 A D Conversion Data When A D conversion is completed the converted data is stored in the A D data register Each activation channel is equipped with an A D data reg...

Страница 3: ...h a higher priority order occurs while A D conversion is in progress The current conversion is interrupted and the activation factor with the higher priority order is processed Arbitration is performed again after this conversion and then the processing of the interrupted activation factor is restarted When an activation factor with a lower priority order occurs while A D conversion is in progress...

Страница 4: ...Rev B 4 3 4 Configuration This section shows the configuration of the 12 bit A D converter 3 4 1 Configuration of the A D Activation Compare The configuration of the A D activation compares shows in the following Figure 1 Configuration of the A D Activation Compare n 31 A D Converter Unit 0 ...

Страница 5: ...120 Series www cypress com Document No 002 04457 Rev B 5 3 4 2 Configuration of the A D Activation Arbitration The configuration of the A D activation arbitration shows in the following Figure 2 Configuration of the A D Activation Arbitration ...

Страница 6: ...ww cypress com Document No 002 04457 Rev B 6 3 4 3 Configuration of the 12 Bit A D Converter Control The configuration of the A D Converter Control shows in the following Figure 3 Configuration of the 12 Bit A D Converter Control n 32 A D Converter Unit 0 ...

Страница 7: ...shows in the following And setting items shows in the Figure4 Figure 4 A D Converter Function Example of Settings A D Converter time setting Activation channel and factor setting Range comparison function setting A D Converter Start setting End Analog input enable setting A D Converter setting start A D Converter end interrupt setting Range Comparison interrupt setting Interrupt setting End ...

Страница 8: ...value Analog input pin AN14 Sampling time 1 3µs Compare time 0 8µs Activation channel Channel 0 Activation factor Software A D Converter mode Repeat conversion A D Converter protection Disable A D Conversion Completion interrupt Enable A D Range Comparison function Enable A D Range Comparison interrupt Enable Each item Figure 4 of the setting flow describes in the following ...

Страница 9: ...r ADER This register is target of the Key Code Register Please refer to the 4 1 1 Key Code Register of the CHAPTER 12 Bit A D Converter in the S6J3110 S6J3120 Series Hardware Manual This application note setting is AN14 in the analog input pin Figure 5 Analog Input Enable Setting Flow Analog input pin setting AN14 ADER_ADER0 0x00004000 ADER register key code setting Analog inputs enable setting En...

Страница 10: ...ling time And this register selects whether to set sampling time for A D conversion for each channel or to set a common setting Figure 6 A D Converter Time Setting Flow Note When the peripheral clock is 36MHz operation on S6J311E Sampling time setting 48 peripheral clock cycles 1 3µs ADC0_ADMD0_ST 3 Common sampling time setting to all channels ADC0_ADMD0_STPCEN 0 A D Converter time setting End Com...

Страница 11: ...The activation factor setting uses A D Activation Trigger Control Status Register ADTCS and ADTECS The Interrupt Request Enable Bit sets disable The Repeat Conversion Selection Bit sets repeat conversion The A D Data Register Protection Enable Bit sets disable These settings are in the ADTCS register The Activation channel and factor settings flow shows in the following Figure 7 A D Converter Acti...

Страница 12: ...setting ADC0_ADMD0_ST 3 Compare time setting ADC0_ADMD0_CT 0 A D Activation Trigger Extended Control Resgister Analog Channel select ADC0_ADTECS0_CHSEL 14 Activation factor setting Software trigger ADC0_ADTCS0_STS 0 ADC0_ADTECS0_STS2 0 A D Interrupt request disable ADC0_ADTCS0_INTE 0 Repeat conversion ADC0_ADTCS0_RPT 1 A D data register protection disable ADC0_ADTCS0_PRT 0 Analog input enable sett...

Страница 13: ... Register ADRCUT ADRCLT Please refer to the P18 Appendix About the Range Comparison Operation The range comparison function setting flow shows in the following Figure 9 Range Comparison Function Setting Flow Upper and Lower threshold setting Upper Threshold Setting ADRCUT0 C 11 0 0x800 Lower Threshold Setting ADRCLT0 C 11 0 0x555 Inside outside Range Check Selection ADRCCS0 RCOIRS 1 Range Comparis...

Страница 14: ...ivation Register ADTSS The A D converter start setting flow shows in the following void AD_RangeCompare void A D Range comparison execution enable ADC0_ADRCCS0_RCOE 1 A D Upper threshold setting ADC0_ADRCUT0_C 0x800 A D Lower threshold setting ADC0_ADRCLT0_C 0x555 A D Upper and Lower threshold ADRCUT0 ADRCLT0 ADC0_ADRCCS0_RCOTS 0 A D Inside check setting ADC0_ADRCCS0_RCOIRS 1 A D Range comparison ...

Страница 15: ...ation channel enable setting ADTSE0 ADT0 1 A D Converter Interrupt Request enables setting ADTCS0 INTE 1 A D Converter activation ADTSS0 START 1 A D Converter Start setting void AD_Start void A D software activation channel enable ADC0_ADTSE0_ADT0 1 A D Interrupt request enable ADC0_ADTCS0_INTE 1 A D conversion activation ADC0_ADTSS0_START 1 A D software activation channel enable setting A D Conve...

Страница 16: ...n Trigger Control Status Clear Register ADTCSC clear the A D converter interrupt request flag The A D converter Interrupt setting flow shows in the following Figure 13 A D Converter End Interrupt Routine Setting Flow The sample program shows in the following Figure 14 A D Converter End Interrupt Routine Setting Program A D Converter end interrupt routine FN_IRQ_DEFINE_BEGIN Adc_Isr_Adc0_EndOfConve...

Страница 17: ...on Flag Clear Register ADRCIFC Figure 15 Range Comparison Interrupt Routine Setting Flow The sample program shows in the following Figure 16 Range Comparison Interrupt Routine Setting Program Range comparison interrupt factor flag clear ADRCIFC0 RCINTC0 1 End Range Comparison interrupt routine A D Range compare detection interrupt routine FN_IRQ_DEFINE_BEGIN Adc_Isr_Adc0_RangeCompare INTERRUPTS_IR...

Страница 18: ...es the upper and lower threshold setting registers ADRCUT ADRCLT selected by the upper and lower threshold selection bits for range comparison ADRCCS RCOTS1 RCOTS0 with the A D data bits ADTCD D11 to D0 The A D Range comparison detection shows in the following Figure17 A D conversion result 1 4 5 are detected by setting of the inside range threshold A D conversion result 2 3 6 are detected by sett...

Страница 19: ...ction of range comparison result and reduces noise When as many detection states of range comparison result as the count set by the continuous detection count specification for range comparison ADRCCS RCOCD2 to RCOCD0 are continuously detected the range comparison interrupt factor flag bit ADRCIF RCINT is set to 1 If range comparison result comes to be not detected even once during continuous dete...

Страница 20: ...de Setting Register ADMD sets the function of setting the compare time and sampling time for A D conversion Table 4 A D Mode Setting Register Example of Settings Bit Bit name Description Setting register Value Contents 7 STPCEN Sampling Time Setting per Channel Enable Bit 0 Sampling time setting common to all channels 6 4 Reserved Reserved 0 3 2 CT 1 0 Compare Time Setting Bits 0 28 peripheral clo...

Страница 21: ...uest output 12 11 STS 1 0 A D activation Factor Selection Bits 0 Software activation 10 RPT Repeat Conversion Selection Bit 1 Repeat conversion 9 PRT A D Data Register Protection Enable Bit 0 Protection disabled 8 PRTS A D Data Register Protection Release Selection Bit 0 Data reading and interrupt flag clear 7 6 SEL 1 0 Count Direction Selection Bits 0 Both up down count 5 BUFX Compare Register Bu...

Страница 22: ...e comparison interrupt enabled 2 RCOE Range Comparison Execution Enable Bit 1 Range comparison execution enabled 1 0 RCOTS 1 0 Upper and Lower Threshold Selection Bits 0 Upper Threshold register 0 Lower Threshold register0 4 7 Upper Threshold Setting Register ADRCUT The Upper Threshold Setting Register ADRCUT sets the upper threshold to be used to compare ranges Table 9 Upper Threshold Setting Reg...

Страница 23: ...ctivation channel is specified by the A D software activation channel selection register ADTSE Table 12 A D Software Activation Register Example of Settings Bit Bit name Description Setting register Value Contents 7 1 Reserved Reserved 0 0 START A D Conversion activation Bit Software 1 Activate the A D conversion function 4 11 A D Data Register ADTCD The A D Data Register ADTCD stores the A D conv...

Страница 24: ... 31 0 RCINT 31 0 Conversion Data Error Flag Bits 0 1 Range comparison interrupt factor are clear 0 or generation status 1 Note The RCINT bit is read only The RCINT bit is cleared to 0 by writing 1 in the ADRCIFC Register RCINTC bit 4 13 Range Comparison Flag Clear Register ADRCIFC The Range Comparison Flag Clear Register ADRCIFC clears the bits in the range comparison flag register Table 15 Range ...

Страница 25: ...3110 S6J3120 Series www cypress com Document No 002 04457 Rev B 25 5 Reference 1 32 BIT MICROCONTROLLER Cypress Traveo Family S6J3110 series HARDWARE MANUAL 2 32 BIT MICROCONTROLLER Cypress Traveo Family S6J3120 series HARDWARE MANUAL ...

Страница 26: ...4457 How to Use A D Converter for S6J3110 S6J3120 Series Document Number 002 04457 Revision ECN Orig of Change Submission Date Description of Change KHAS 07 31 2015 Initial release A 5058934 KHAS 03 15 2016 Converted Spansion Application Note S6J3110_AN708 00015 to Cypress format B 5876001 AESATMP8 09 07 2017 Updated logo and Copyright ...

Страница 27: ...s patents that are infringed by the Software as provided by Cypress unmodified to make use distribute and import the Software solely for use with Cypress hardware products Any other use reproduction modification translation or compilation of the Software is prohibited TO THE EXTENT PERMITTED BY APPLICABLE LAW CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS DOCUMENT OR ...

Отзывы: