Cypress S29CD016J, Руководство пользователя

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Document Number: 002-00948 Rev. *C Page 52 of 74
S29CD032J
S29CD016J
S29CL032J
S29CL016J
17. AC Characteristics
17.1 V
CC
and V
IO
Power-up
Figure 18. V
CC
and V
IO
Power-up Diagram
17.2 Asynchronous Operations
Notes
57. Not 100% tested.
58. See
Figure 16 and Table 20 for test specifications.
59. TOE during Read Array.
Table 22. V
CC
and V
IO
Power-up
Parameter Description Test Setup Speed Unit
t
VCS
V
CC
Setup Time Min 50 µs
t
VIOS
V
IO
Setup Time Min 50 µs
t
RSTH
RESET# Low Hold Time Min 50 µs
Table 23. Asynchronous Read Operations
Parameter
Description Test Setup
Speed Options
Unit
JEDEC Std.
75 MHz
0R
66 MHz
0P
56 MHz
0M
40 MHz
0J/1J
t
AVAV
t
RC
Read Cycle Time (Note 1) Min 54 ns
t
AVQV
t
ACC
Address to Output Delay
CE# = V
IL
OE# = V
IL
Max 54 ns
t
ELQV
t
CE
Chip Enable to Output Delay OE# = V
IL
Max 54 ns
t
GLQV
t
OE
Output Enable to Output Delay Max 20 ns
t
EHQZ
t
DF
Chip Enable to Output High-Z (Note 57) Max 10 ns
t
GHQZ
t
DF
Output Enable to Output High-Z (Note 57)
Min 2 ns
Max 10 ns
t
OEH
Output Enable Hold Time
(Note 57)
Read Min 0 ns
Toggle and
Data# Polling
Min 10 ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First (Note 57)
Min 2 ns
V
CC
V
IOP
RESET#
t
VCS
t
RSTH
t
VIOS