MB95310L/370L Series
Document Number: 002-07519 Rev. *A
Page 61 of 80
(V
CC
= 3.0 V
10%, AV
SS
= V
SS
= 0.0 V, T
A
=
40
C to
85
C)
(Continued)
Parameter
Symbol
Pin name
Conditions
Value*
2
Unit
Remarks
Min
Max
SCL clock “L” width
t
LOW
SCL0
R = 1.7 k
,
C = 50 pF*
1
(2
nm / 2) t
MCLK
20
—
ns
Master mode
SCL clock “H” width
t
HIGH
SCL0
(nm / 2)t
MCLK
20
(nm / 2)t
MCLK
20
ns
Master mode
Start condition hold
time
t
HD;STA
SCL0, SDA0
(
1
nm / 2) t
MCLK
20
(
1
nm)t
MCLK
20
ns
Master mode
Maximum value is ap-
plied when m, n = 1, 8.
Otherwise, the mini-
mum value is applied.
Stop condition setup
time
t
SU;STO
SCL0, SDA0
(1
nm / 2) t
MCLK
20
(1
nm / 2)t
MCLK
20
ns
Master mode
Start condition setup
time
t
SU;STA
SCL0, SDA0
(1
nm / 2)t
MCLK
20
(1
nm / 2)t
MCLK
20
ns
Master mode
Bus free time be-
tween stop condition
and start condition
t
BUF
SCL0, SDA0
(2 nm
4)t
MCLK
20
—
ns
Data hold time
t
HD;DAT
SCL0, SDA0
3 t
MCLK
20
—
ns
Master mode
Data setup time
t
SU;DAT
SCL0, SDA0
(
2
nm / 2)t
MCLK
20 (
1
nm / 2)t
MCLK
20
ns
Master mode
When assuming that
“L” of SCL is not ex-
tended, the minimum
value is applied to first
bit of continuous data.
Otherwise, the maxi-
mum value is applied.