Recommendation for Hardware Setup 32-Bit FR81S Family
Document No. 002-09375 Rev. *B
9
3.3
Oscillator Pins
The following table shows the oscillator pins and gives short information about how to connect them.
Table 6. Oscillator pins in use
Pin Name
Function
X0, X0A
Oscillator input, if not used so shall be connected with pull-up or pull-down resistor (see please
DS)
X1*, X1A*
*Only for devices with subclk.
Oscillator output, the crystal and load capacitor must be connected with shortest distance and
without any vias.
If not used so shall be open
3.4
Power Line Routing
In general, the Vcc and Vss lines should not be routed in “chains”, but in “star shape”. For two layers board the Vss is
recommended as ground plane which covers the chip package, and is connected in one point to Vss of the whole circuit
to avoid a ground loop.
Below is a principal example of a bad and a good power line routing:
Figure 5. Example of bad vs. good power line routing
For four and more layers PCB the Vcc and Vss should be routed as a plane in the inner layers of PCB. Concerning the
layer stack the several Vdd power supply planes should be not overlapped in parallel layers to avoid noise coupling.
Recommendation for good EMC behaviour:
▪
Use four layers or six layers PCB
▪
Use power supply planes (ground and power) in the inner-layer of PCB layer stack
▪
Reduce the distance between the power planes (low impedance)
▪
One or two decoupling capacitors close to each VCC pad/pair to adjacent VSS-pad/pair (route under).
▪
Use capacitor groups to match frequency behaviour of power supply decoupling. The decoupling capacitors can
have values between 1 nF and 10 µF.
▪
Use ferrite filter for each power domain
▪
Split the used I/O signals in separate layer for low / high speed, and digital / analog signal types
