Recommendation for Hardware Setup 32-Bit FR81S Family
Document No. 002-09375 Rev. *B
17
As you can see in Figure 16 the routing of these components is very important in order to reduce EMI effects. These
components have to be placed on the same layer as the MCU. The connection of C1 and C2 to the Vss pin must be
routed in a star way and so close as possible. The only vias should be placed to connect this ground star routing to the
ground plane in other layer, never use vias to connect these components with the corresponding MCU pins.
Figure 16. Layout example for crystal oscillator circuit
DeCap C
B
on backside
Vias to Vcc plane
on inner layers
Vias to ground plane
on inner layers
Ground plane on
inner layers
X
0
V
c
c
V
s
s
CB
SMD
Quartz Crystal
C1
C2
X
1
R
d
Figure 17. Stray capacitance of PCB
X0
X1
4MHz
CY91F52x
C1
C2
Rd
0R
Rf
Inverter
C3*
C4*
C3*, C4* : Stray
capacitance of PCB
)
(
)
(
)
(
)
(
4
2
3
1
4
2
3
1
C
C
C
C
C
C
C
C
C
L
Equation: C
L
calculation with stray capacitance of PCB.
For a proper performance of the oscillator circuit it is necessary to match the load capacitors (C
1
, C
2
) with the crystal
when the MCU, PCB or crystal are replaced for a different one.
As a result of this matching test the value of C
L
is provided and then the calculation of C
1
and C
2
can be done using
the Equation.
