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Recommendation for Hardware Setup 32-Bit FR81S Family
Document No. 002-09375 Rev. *B
24
4.3
5 V Tolerant Input pins
In case of using of MCU on 3 V level and peripherals on 5 V level of power supply the ESD please note the influence
of ESD clamping structure of usual GPIO pin.
Figure 29. Standard IO and 5 V Tolerant IO
VCC
+3V
+5V
VCC
VSS
VSS
IN
OUT
MCU
Peripheral
VCC
+3V
+5V
VCC
VSS
VSS
IN
OUT
MCU
Peripheral
5V tolerant
input
(a) Standard IO
(b) 5 V Tolerant IO
For 5 V Tolerant IO, the diode is not attached to the Pch side. It is a protection circuit in the parasitic bipolar and the
diode to VSS. For the reason, clamp current cannot be specified in the DS for such kind of input pins. 5 V tolerant
inputs are e.g. for CY91
F52x: P035, P041, P093, P122. Please see also the note *6 in the DS “ELECTRICAL
CHARACTERISTICS
– Maximum clamp current”. The current limitation with series resistor for + B signal is input is not
possible for a 5 V tolerant input.