Cypress CY3677, Руководство пользователя, Страница: 32 / 45

CY3677 Evaluation Kit User Guide, Doc. No. 002-12185 Rev. *D 32
A.
Appendix
A.1. BCP Script to Disable the Default Power-up Profile of CY29430
The CY3677 EVK is shipped with a programmed CY29430 device. This program is loaded in a particular memory location of
the CY29430 device so that the on-board crystal frequency (114.285 MHz) comes out at CLK_P and CLK_N. This is the
default power-up profile of the CY3677 EVK. But this power-up profile disables the OE functionality of the CY29430 device.
This profile also has impact on the VCXO performance of the CY29430 device. Hence the output clock will show higher RMS
Phase Jitter if VCXO is set
Enable through ClockWizard 2.1.
To disable the default power-up profile of the CY29430 device, execute the following script in the Bridge Control Panel tool:
1. Create a file with a name of your choice and the extension .iic (for example,
“
myfile.iic
”).
2. Write the following set of commands in your .iic file:
w 55 63 00
w 55 63 01
[delay=1]
w 55 d7 C0
[delay=5]
w 55 61 00
w 55 61 03
[delay=5]
w 55 61 00
3. Open the Bridge Control Panel utility from All Programs > Cypress > Bridge Control Panel > Bridge Control Panel .
4. Click on the specific
KitProg/…
device in the connected I2C/SPI/RX8 Ports. The connected indicator is displayed in
green color indicating the device is connected successfully (see Figure A-1 ).
5. Go to File > Open File > .iic . The sequence of commands will appear in the editor, as shown in Figure A-1 .
6. Check the Send all strings box, as shown in Figure A-1 .
7. Click the Send button, as shown in Figure A-1 .
8. Close the Bridge Control Panel.
9. Power cycle the CY29430 device.
Note: The device will permanently switch back to the unprogrammed state and will not show any default clock output during
power-up. But you can perform all possible programming using the ClockWizard 2.1 tool, and evaluate the CY29430 device
in the CY3677 EVK.