Example Projects
CY3677 Evaluation Kit User Guide, Doc. No. 002-12185 Rev. *D
31
Figure 5-6. VCXO Settings of Total Pull Range 275 ppm and VCXO Gain Polarity Negative
9. Repeat Step 4 and 5.
10. Measure frequency using a standard instrument (for example: an oscilloscope of bandwidth 8 GHz, frequency counter,
or signal source analyzer). You will see the frequency has changed from 156.25 MHz to 156.30 MHz.
The measured frequencies 156.20 MHz and 156.30
MHz are the minimum and maximum frequencies that can be
controlled through VCXO operation.
CAUTION
If you want to evaluate the Phase Noise plot of the CY29430 device in CY3677 EVK for any project
with the VCXO parameter set as Enable through Functional Program, it is required to do Large
change update prior to taking Phase Noise plot.
User can directly take Phase Noise plot of the CY29430 without doing Large change update if the
device is eFuse programmed.
VCXO input jumper J2 should not be powered by any external source. Incorrect connection of
external power source may damage the EVK. If user wants to apply any external source for
VCXO evaluation, it is recommended to contact our support through the
www.cypress.com/support
web page, or e-mail at
.
Note [1]:
The default 114.285-MHz LVDS profile programmed into the device does not have the OE functionality enabled.
Hence you cannot control it through the J16 jumper.
Note [2]:
If you want to evaluate the OE functionality of the device through the functional programming by setting OE as
Active High in the ClockWizard project, it is recommended to populate the J16 jumper between pin 2 and 3 to disable the
clock, and to remove jumper J16 to enable the output clock.
The example projects provide instruction guidelines for four I/O standards (HCSL, LVPECL, LVDS, and LVCMOS). Other
than these four I/O standards, the CY29430 supports other standards such as CML and LVPECL2. Evaluation of these two
configurations needs additional laboratory setup and oscilloscope adjustments. Cypress recommends that you contact
Cypress Technical support through the
www.cypress.com/support
web page, or e-mail at
if you are
evaluating the CML or LVPECL2 I/O standard or want to use different coupling, or any other termination voltage that is not
part of these example projects.
Any of the four example projects provided in this document, or a project you created can be permanently programmed to the
nonvolatile memory. Refer to the
eFuse Programming of the CY29430
section for the required guidelines on using this feature.
Содержание CY3677
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