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90 EZ-USB Development Kit User Guide, Doc. # 001-66390 Rev. *D
EZ-USB Development Kit Firmware Examples
8.12 extr_intr Firmware Example
This example is used to demonstrate the use of external interrupts INT0, INT1, INT4, INT5, and
INT6. The relevant interrupt service routines (ISR) for each of these external interrupts were pro-
vided in
isr.c . Table 8-3 lists the registers and associated pins for each of these interrupts.
Refer to the Chapter 4, 'Interrupts', in the EZ-USB technical reference manual.
Notes
1. The INT4 and INT5 have dedicated pins only in the 100 and 128 package. The pin for INT4 is
shared between the GPIF, FIFO, and INT4 interrupts; setting INTSETUP.1 to “0” enables the
INT4 operation. The default USBJmpTb.a51 has an auto-vectoring option for INT4. To disable
this, the following lines are commented in the USBJmpTb.a51:
■
CSEG AT 53H
■
USB_Int4AutoVector equ $ + 2
■
ljmp USB_Jump_Table
2. IE, EIE, IP, EIP, TCON, EXIF, and EICON are all SFRs. For a description of these SFRs,
refer to the EZ-USB technical reference manual
3. Active low interrupts are falling edge triggered and active high interrupts are rising edge trig-
gered. In the example, the following register configurations are done in ‘extr_int.c’ for setting up
the interrupts:
//INT0 and INT1
PORTACFG = 0x03; // PA0 and PA1 are pins for INT0 and INT1 respectively.
TCON |= 0x05; // INT0 and INT1 are configured as Edge triggered inter-
rupts.
//INT4
INTSETUP &= ~0x02; // If INTSETUP.1=0, then INT4 is supplied by the pin.
Else, the
// interrupt is supplied internally by FIFO/GPIF sources.
//INT5 is a dedicated pin, available in the 100 and 128 pin packages.
//INT6
PORTECFG = 0x20; // PE5 is INT6
OEE &= ~0x20;
//Enable External Interrupts
EIE |= 0x1C; // Enable External Interrupts 4, 5 and 6
IE |= 0x05; // Enable External Interrupts 0 and 1
Table 8-3. External Interrupts and Register Definitions in EZ-USB Device
Interrupt
Interrupt
Enable
Interrupt
Pin
Priority
Control Natural
Priority
Interrupt
Request
Flag
Interrupt Type
Interrupt type
Controlling Bit
INT0 IE.0 PA.0 IP.0 1 TCON.1
Level or Edge sen-
sitive, active low
[TCON.0]
INT1 IE.2 PA.1 IP.2 3 TCON.3
Level or Edge,
sensitive active low
[TCON.2]
INT4 EIE.2 See note 1 EIP.2 10 EXIF.4
Edge sensitive,
active high
--
INT5 EIE.4 See note 1 EIP.3 11 EXIF.5
Edge sensitive,
active low
--
INT6 EIE.6 PE.5 EIP.4 12 EICON.3
Edge sensitive,
active high
--