Cypress CY3674, Руководство пользователя

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EZ-USB Development Kit User Guide, Doc. # 001-66390 Rev. *D 107
Resources
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AN15813 - Monitoring the EZ-USB FX2LP
™
VBUS
This application note explains the purpose and methods of monitoring VBUS from the upstream
connector using the EZ-USB FX2LP.
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AN43841 - EZ-USB
®
FX2LPTM/FX2LP18 56-Ball BGA PCB Layout Guidelines
The 56-ball VFBGA version of the FX2LP(CY7C68013A) or FX2LP18(CY7C68053) USB micro-
controller chips is a smaller package version of the QFN package. The 56-ball package meets the
needs of space sensitive printed circuit board (PCB) designs. This application note provides
guidelines for designing a PCB with either FX2LP(CY7C68013A) or FX2LP18(CY7C68053).
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AN4067 - Endpoint FIFO Architecture of EZ-USB FX1/FX2LP™
This application note describes the FIFO architecture of the EZ-USB FX1, the full-speed USB
microcontroller and the EZ-USB FX2LP"·, the high-speed USB microcontroller. The purpose of
this application note is to help the user understand the basics of FX1/FX2LP and get familiar with
the terminologies used while describing the data flow in FX1/FX2LP. The application note
addresses three modes of operation of the FX1/FX2LP, Endpoint Configuration and Multiple Buff-
ering, Three Domains that form the basic component of the FIFO architecture, Arming and com-
mitting endpoint buffers Endpoint operation in manual vs. auto mode.
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AN4053 - Streaming Data Through Isochronous/Bulk Endpoints on EZ-USB® FX2™ and EZ-
USB FX2LP™
This application note provides brief background information on what is involved while designing
for a streaming application using the EZ-USB FX2(TM) or the EZ-USB FX2LP(TM) part. It pro-
vides information on streaming data through bulk endpoints, isochronous endpoints, and high-
bandwidth isochronous endpoints along with pitfalls to consider and avoid while using the FX2/
FX2LP for designing high-bandwidth applications.
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AN67442 - SPI Implementation Using Serial Mode-0 of EZ-USB FX2LP™
This application note describes the implementation of serial peripheral interface (SPI) protocol
using the FX2LP UART port in serial mode 0. This demonstration uses FX2LP as the SPI master
for transferring data to and from an AT25080A EEPROM device. The example code includes
functions to the Write/Read byte to and from AT25080A EEPROM.
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AN58069 - Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in
FX2LP
This application note explains how to implement an 8-bit parallel MPEG2-TS interface using the
Slave FIFO mode. The example code uses the EZ-USB FX2LP™ at the receiver end and a data
generator as the source for the data stream. The hardware connections and example code are
included along with this application note.
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AN58170 - Code/Memory Banking Using EZ-USB
®
The EZ-USB
®
family of chips has an 8051 core. The 8051 core has a 16-bit address line and is
only able to access 64 KB of memory. However, the firmware size sometimes exceeds 64 KB
This application note describes methods of overcoming this 64 KB limitation and also demon-
strates the implementation of one such method.
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AN57322 - Interfacing SRAM with FX2LP over GPIF
This application note discusses how to connect Cypress SRAM CY7C1399B to FX2LP over the
General Programmable Interface (GPIF). It describes how to create read and write waveforms
using the GPIF Designer. This application note is also useful as a reference to connect FX2LP to
other SRAMs.
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AN14558 - Implementing a SPI Interface with EZ-USB FX2LP™
This application note demonstrates how to implement a SPI interface. It uses the EZ-USB FX2LP
as a SPI Master and a SPI Serial EEPROM (25AA256) as a SPI slave. This example comes with
a host application with which the user can access the EEPROM. The EZ-USB FX2LP firmware