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CY62167EV30 MoBL

®

Document #: 38-05446 Rev. *E

Page 2 of 14

Pin Configuration

Figure 1.  48-Ball VFBGA (6 x 7 x 1mm) / (6 x 8 x 1mm) Top View 

[1, 2, 3]

Figure 2.  48-Pin TSOP I Top View 

[3, 4]

Product Portfolio 

Product

V

CC

 Range (V)

Speed 

(ns)

Power Dissipation

Range

Operating I

CC 

(mA)

Standby I

SB2 

(

μ

A)

f = 1 MHz

f = f

max

Min

Typ

[5]

Max

Typ

[5]

Max

Typ

[5]

Max

Typ

[5]

Max

CY62167EV30LL

Industrial/Auto-A

2.2

3.0

3.6

45

2.2

4.0

25

30

1.5

12

WE

A

11

A

10

A

6

A

0

CE

1

I/O

10

I/O

8

I/O

9

A

4

A

5

I/O

11

I/O

13

I/O

12

I/O

14

I/O

15

V

SS

A

9

A

8

OE

Vss

A

7

I/O

0

BHE

CE

2

A

17

BLE

V

CC

I/O

2

I/O

1

I/O

3

I/O

4

I/O

5

I/O

6

I/O

7

A

15

A

14

A

13

A

12

A

19

A

18

NC

3

2

6

5

4

1

D

E

B

A

C

F

G

H

A

16

 NC

V

CC

A

1

A

2

A

3

1
2
3
4
5

6
7
8
9
10

11
12
13
14
15

16
17
18
19
20

21
22
23
24

48
47
46
45
44

43
42
41
40
39

38
37
36
35
34

33
32
31
30
29

28
27
26
25

A15
A14
A13
A12

A11
A10
A9
A8
A19

NC
WE
CE

2

NC
BHE

BLE
A18
A17
A7
A6

A5
A4
A3
A2
A1

A16
BYTE
Vss
IO15/A20

IO7
IO14
IO6
IO13
IO5

IO12
IO4
Vcc
IO11
IO3

IO10
IO2
IO9
IO1
IO8

IO0
OE
Vss
CE

1

A0

Notes

1. The information related to 6 x 7 x 1 mm VFBGA package is preliminary.
2. Ball H6 for the VFBGA package can be used to upgrade to a 32M density.
3. NC pins are not connected on the die.
4. The BYTE pin in the 48-TSOPI package has to be tied to V

CC

 to use the device as a 1M X 16 SRAM. The 48-TSOPI package can also be used as a 2M X 8 SRAM 

by tying the BYTE signal to V

SS

. In the 2M x 8 configuration, Pin 45 is A20, while BHE, BLE and IO

8

 to IO

14

 pins are not used.

5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V

CC

 = V

CC

(typ), T

A

 = 25°C.

[+] Feedback 

Содержание CY62167EV30

Страница 1: ...HIGH The input and output pins I O0 through I O15 are placed in a high impedance state when the device is deselected CE1 HIGH or CE2 LOW outputs are disabled OE HIGH both Byte High Enable and Byte Lo...

Страница 2: ...21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE CE2 NC BHE BLE A18 A17 A7 A6 A5 A4 A3 A2 A1 A16 BYTE Vss IO15 A20 IO7 IO14...

Страница 3: ...package 0 3 0 7 9 V IIX Input Leakage Current GND VI VCC 1 1 A IOZ Output Leakage Current GND VO VCC Output Disabled 1 1 A ICC VCC Operating Supply Current f fMAX 1 tRC VCC VCC max IOUT 0 mA CMOS leve...

Страница 4: ...V ICCDR 10 Data Retention Current VCC 1 5V to 3 0V CE1 VCC 0 2V CE2 0 2V VIN VCC 0 2V or VIN 0 2V Industrial Auto A 45ZXI TSOP I 8 A VCC 1 5V CE1 VCC 0 2V CE2 0 2V VIN VCC 0 2V or VIN 0 2V Industrial...

Страница 5: ...tSD Data Setup to Write End 25 ns tHD Data Hold from Write End 0 ns tHZWE WE LOW to High Z 16 17 18 ns tLZWE WE HIGH to Low Z 16 10 ns Notes 14 Test conditions for all parameters other than tri state...

Страница 6: ...PREVIOUS DATA VALID DATA VALID RC tAA tOHA tRC ADDRESS DATA OUT 50 50 DATA VALID tRC tACE tDOE tLZOE tLZCE tPU HIGH IMPEDANCE tHZOE tPD tHZBE tLZBE tHZCE tDBE OE CE1 ADDRESS CE2 BHE BLE DATA OUT VCC S...

Страница 7: ...rms continued tHD tSD tPWE tSA tHA tAW tSCE tWC tHZOE VALID DATA tBW NOTE 24 CE1 ADDRESS CE2 WE DATA I O OE BHE BLE Notes 22 Data IO is high impedance if OE VIH 23 If CE1 goes HIGH and CE2 goes LOW si...

Страница 8: ...le No 2 Figure 9 shows WE controlled OE LOW write cycle waveforms 23 Figure 9 Write Cycle No 3 Switching Waveforms continued tHD tSD tPWE tHA tAW tSCE tWC tHZOE VALID DATA tBW tSA NOTE 24 CE1 ADDRESS...

Страница 9: ...Read Active ICC L H H L H L Data Out I O0 I O7 High Z I O8 I O15 Read Active ICC L H H L L H High Z I O0 I O7 Data Out I O8 I O15 Read Active ICC L H H H L H High Z Output Disabled Active ICC L H H H...

Страница 10: ...62167EV30LL 45BVXI 51 85150 48 ball VFBGA 6 x 8 x 1 mm Pb free CY62167EV30LL 45ZXI 51 85183 48 pin TSOP I Pb free CY62167EV30LL 45ZXA 51 85183 48 pin TSOP I Pb free Automotive A Shaded areas contain p...

Страница 11: ...continued A 1 A1 CORNER 0 75 0 75 0 30 0 05 48X 0 25 M C A B 0 05 M C B A 0 15 4X 0 21 0 05 1 00 MAX C SEATING PLANE 0 55 MAX 0 25 C 0 10 C A1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 3 75 5 25 B C D E F G H...

Страница 12: ...ge Diagrams continued 1 N 0 020 0 50 0 007 0 17 0 037 0 95 0 002 0 05 0 5 MAX 0 028 0 70 0 010 0 25 0 004 0 10 0 011 0 27 0 041 1 05 0 047 1 20 0 472 12 00 0 724 18 40 0 787 20 00 0 006 0 15 TYP 0 020...

Страница 13: ...Changed tLZOE from 3 ns to 5 ns Changed tHZOE tHZCE tHZBE and tHZWE from 15 ns to 18 ns Changed tSCE tAW and tBW from 40 ns to 35 ns Changed tPE from 30 ns to 35 ns Changed tSD from 20 ns to 25 ns Up...

Страница 14: ...firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation...

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