CS5521 CS5523
DS317PP2
27
The converter’s input ranges were chosen to guar-
antee gain calibration accuracy to 1 LSB when gain
calibration is performed. This is useful when a user
wants to manually scale the full scale range of the
converter and maintain accuracy. For example, if a
gain calibration is performed with a 2.5 V full scale
voltage and a 1.25 V input range is desired, the user
can read the contents of the gain register, shift it by
1 bit, and then write the results back to the gain reg-
ister.
Assuming a system can provide two known voltag-
es, the following equations allow the user to manu-
ally compute the calibration register’s values based
on two uncalibrated conversions (see note). The
offset and gain calibration registers are used to ad-
just a typical conversion as follows:
Rc = (Ru + Co) * Cg / 2
22
.
Calibration can be performed using the following
equations:
Co = (Rc0/G - Ru0)
Cg = 2
22
* G
where G = (Rc1 - Rc0)/(Ru1-Ru0).
Note: Uncalibrated conversions imply that the gain and offset
registers are at default {gain register = 0x400000 (Hex) and
offset register = 0x000000 (Hex)}.
The variables are defined below.
V0
=
First calibration voltage
V1
=
Second calibration voltage (greater than V0)
Ru
=
Result of any uncalibrated conversion
Ru0
=
Result of uncalibrated conversion V0
(24-bit integer or 2’s complement)
Ru1
= Result of uncalibrated conversion of V1
(24-bit integer or 2’s complement)
Rc
=
Result of any conversion
Rc0
=
Desired calibrated result of converting V0
(24-bit integer or 2’s complement)
Rc1
=
Desired calibrated result of converting V1
(24-bit integer or 2’s complement)
Co
=
Offset calibration register value
(24-bit 2’s complement)
Cg
=
Gain calibration register value
(24-bit integer)
Calibration Tips
Calibration steps are performed at the output word
rate selected by the WR2-WR0 bits of the configu-
ration register. Since higher word rates result in
conversion words with more peak-to-peak noise,
calibration should be performed at lower output
word rates. Also, to minimize digital noise near
the device, the user should wait for each calibration
step to be completed before reading or writing to
the serial port.
For maximum accuracy, calibrations should be per-
formed for offset and gain (selected by changing
the G2-G0 bits of the configuration register). Note
that only one gain range can be calibrated per phys-
ical channel. And if factory calibration of the user’s
system is performed using the system calibration
capabilities of the CS5521/23, the offset and gain
register contents can be read by the system micro-
controller and recorded in EEPROM. These same
calibration words can then be uploaded into the off-
set and gain registers of the converter when power
is first applied to the system, or when the gain range
is changed.
Limitations in Calibration Range
System calibration can be limited by signal head-
room in the analog signal path inside the chip as
discussed under the Analog Input section of this
data sheet. For gain calibration the full scale input
signal can be reduced to the point in which the gain
register reaches its upper limit of (4-2
-22
decimal)
or FFFFFF (hexadecimal). Under nominal condi-
tions, this occurs with a full scale input signal equal
to about 1/4 the nominal full scale. With the con-
verter’s intrinsic gain error, this full scale input sig-
nal may be higher or lower. In defining the
minimum Full Scale Calibration Range (FSCR)
under “Analog Characteristics”, margin is retained
