CS5521 CS5523
DS317PP2
13
instructs the converter to read from or write to a
register(s), perform a conversion or a calibration,
or perform a NULL command. If a command other
than start calibration or NULL command is re-
ceived, the serial port enters data mode. In data
mode, either the internal registers, the CSRs, or the
CDF (read only) are read from or written to. The
number of bytes transferred depends on the type of
register/FIFO being accessed and the way it is ac-
cessed. Once the data is transferred, the serial port
either remains in data mode or returns to the com-
mand mode. The mode which is entered depends
on the status of the loop (LP), the MC (multiple
conversion), and the RC (read convert) bits in the
configuration register. More information concern-
ing the LP bit is provided in the Conversion/Cali-
bration Protocol section. Note that SDO will fall to
logic 0 anytime a calibration or conversion is com-
pleted.
Serial Port Interface
The CS5521/23’s serial interface consists of four
control lines: CS, SCLK, SDI, SDO.
CS, Chip Select, is the control line which enables
access to the serial port. If the CS pin is tied low,
the port can function as a three wire interface.
SCLK, Serial Clock, is the serial bit-clock which
controls the shifting of data to or from the ADC’s
serial port. The CS pin must be held low (logic 0)
before SCLK transitions can be recognized by the
port logic.
SDI, Serial Data In, is the data signal used to trans-
fer data to the converters.
SDO, Serial Data Out, is the data signal used to
transfer output data from the converters. The SDO
output will be held at high impedance any time CS
is at logic 1. Figure 6 illustrates the serial sequence
necessary to write to, or read from the serial port’s
registers.
To accommodate optoisolators SCLK is designed
with a Schmitt-trigger input to allow an optoisola-
tor with slower rise and fall times to directly drive
the pin. Additionally, SDO is capable of sinking or
sourcing up to 5 mA to directly drive an optoisola-
tor LED. SDO will have less than a 400 mV loss in
the drive voltage when sinking or sourcing 5 mA.
Serial Port Initialization
The serial port is initialized to the command mode
whenever a power-on reset is performed inside the
converter, or when the user transmits the port ini-
tialization sequence. The port initialization se-
quence involves clocking 15 bytes of all 1's,
followed by one byte with the contents ‘11111110’.
This sequence places the chip into command mode
where it awaits a valid command.
Channel-Setup Registers
Table 3 depicts the channel-setup registers (CSRs).
The CS5521 has two CSRs and the CS5523 has four
CSRs. Each CSR contains two logical channels
which are programmed by the user to contain data
conversion information such as: 1) state of the out-
put latch pins, 2) output word rate, 3) gain range, 4)
polarity, and 5) the address of a physical input chan-
nel to be converted. Note that any physical input
channel can be represented in more than one logical
channel with different output rates, gain ranges, and
conversion modes. Once programmed the CSRs act
as a sequencer and determine the order in which con-
versions are performed. To program the CSRs
twelve bits are needed for each logical channel. For
example, to configure CSR #2 in the CS5521, bits 23
to 12 contain information on the third logical chan-
nel and bits 11 to 0 contain information on the fourth
logical channel. While reading/writing CSRs, only
an even number of logical channels are accessed.
The depth bits in the configuration register can only
be: 001, 011, 101, 111 when accessing CSRs.
Conversion Protocol
To acquire single or multiple conversion(s) a com-
mand byte is issued with its MSB=1 and CC2-CC0
= ‘000’. The type of conversion(s) performed and
