CEB-V850ES/FJ3·SJ3 Evaluation Board HardwareUser’s Manual
2
3. Hardware
Specifications
3.1 Overview
The specifications of the CEB-V850ES/FJ3·SJ3 Evaluation Board are shown below.
•
CPU
V850ES/FJ3 × 1 (or V850ES/SJ3)
·V850ES/FJ3
Operating CLK direct mode: 6 MHz, PLL mode: 48 MHz
Oscillator (MAIN: 6 MHz , SUB: 32.768 KHz )
·V850ES/SJ3
Operating CLK direct mode: 4 MHz, PLL mode: 32 MHz
Oscillator (MAIN: 4 MHz , SUB: 32.768 KHz )
* The crystal for MAIN clocks is socket-mounted.
•
Check pin
A through hole for each signal line check is around CPU.
( Two rows of half pitch)
•
External connectors
Expansion connector (30-pin 2.54 pitch) × 2
Connector for FL-PR4, FL-PR5, MINCUBE2 (16-pin) × 1
MINICUBE connector (26-pin) × 1
CAN-I/F connector (D-SUB 9-pin [female] ) × 2
LIN-I/F connector (3-pin) × 2
•
SW
PUSH SW × 3 (RESET, NMI, INTP0 )
DIP SW (8-bit) × 1
•
Jumpers
Development environment setting
(MINICUBE2 / MINICUBE, FL-PR4, FL-PR5)
UART
setting
(USB / FL-PR4, FL-PR5, MINICUBE2)
CAN termination resistance setting
LIN-master/slave
switching
•
LED
Power LED (+5 V ): Green,
7-segment LED ×
1
•
Check pin
+12 V, +5 V, +3.3 V, GND
•
Power supply
AC adapter (DC+12 V) input
With regulator IC, +5 V(FJ3) , +3.3V(SJ3) output