CHAPTER 2 –Hardware Installations
16
PC-686 (CPCI)-LV User’s Manual
DIMM size
Non-ECC configuration
ECC configuration
64MB
8Mbit x 64
8Mbit x 72
128MB
16Mbit x 64
16Mbit x 72
256MB
32Mbit x 64
32Mbit x 72
Note:
All memory components and DIMMs used with the PC-686(CPCI) CPU board
must comply with the PC SDRAM Specification. These include: the PC
SDRAM Specification *memory component specific), the PC Unbuffered DIMM
Specification, and the PC Serial Presence Detect Specification.
2.3.2. Chipset
The Intel 441BX PCIset includes a Host-PCI bridge integrated with both an
optimized DRAM controller and an A.G.P. Interface. The I/O subsystem of the
440BX is based on the PIIX4E, which is a highly integrated PCI-ISA/IDE
Accelerator Bridge. This chipset consists of the Intel 82443BX PCI/A.G.P.
controller (PZC) and the Intel 82371EB PCI/ISA IDE Xccelerator (PIIX4E) bridge
chip.
Intel 82443BX PCI/A.G.P. Controller (PAC)
The PAC provides bus-control signals, address paths, and data paths for
transfers between the processor’s host bus, PCI bus, the A.G.P., and main memory.
The PAC features:
-
Processor Interface control
-
Support for processor host bus frequencies of 100MHz or 66 MHz
-
32-bit addressing
-
desktop Optimized GTL+ compliant host bus interface
-
Integrated DRAM controller, with support for:
-
+3.3V only DIMM DRAM configurations
-
Up to three double sided DIMMs
Содержание PC-686CPCI-LV
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