CHAPTER 6 - BIOS SETUP
PC-686 (CPCI)-LV User’s Manual
105
POST
(hex)
Description
4Eh
1.
Program MTRR of M1 CPU
2.
Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range.
3.
Initialize the APIC for P6 class CPU.
4.
On MP platform, adjust the cacheable range to smaller one in case the cacheable
ranges between each CPU are not identical.
4Fh
Reserved
50h
Initialize USB
51h
Reserved
52h
Test all memory (clear all extended memory to 0)
53h
Reserved
54h
Reserved
55h
Display number of processors (multi-processor platform)
56h
Reserved
57h
1.
Display PnP logo
2.
Early ISA PnP initialization
-Assign CSN to every ISA PnP device.
58h
Reserved
59h
Initialize the combined Trend Anti-Virus code.
5Ah
Reserved
5Bh
(Optional Feature)
Show message for entering AWDFLASH.EXE from FDD (optional)
5Ch
Reserved
5Dh
1.
Initialize Init_Onboard_Super_IO switch.
2.
Initialize Init_Onbaord_AUDIO switch.
5Eh
Reserved
5Fh
Reserved
60h
Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup
utility.
61h
Reserved
62h
Reserved
63h
Reserved
Содержание PC-686CPCI-LV
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Страница 8: ...Table of Contents iv PC 686 CPCI LV User s Manual ...
Страница 18: ...CHAPTER 1 Introduction 10 PC 686 CPCI LV User s Manual 1 7 Connector Jumper Location ...
Страница 20: ...CHAPTER 1 Introduction 12 PC 686 CPCI LV User s Manual ...
Страница 50: ...CHAPTER 3 Jumper Setting 42 PC 686 CPCI LV User s Manual ...
Страница 72: ...CHAPTER 5 Software Utilities 64 PC 686 CPCI LV User s Manual ...
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