Compaq iPAQ 1.0, Техническое справочное руководство

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Technical Reference Guide
Compaq iPAQ Series of Desktop Personal Computers
Second Edition - February 2001
5-35
5.9.4 NIC PROGRAMMING
Programming the NIC controller consists of configuration, which occurs during POST, and
control, which occurs at runtime.
5.9.4.1 Configuration
The 825xx controller is a PCI device and configured though PCI configuration space registers
using PCI protocol described in chapter 4. The PCI configuration registers are listed in the
following table:
Table 5–23. NIC Controller PCI Configuration Registers
Table 5-23.
NIC Controller PCI Configuration Registers
PCI
Addr.
Register
Reset
Value PCI
Addr.
Register
Reset
Value
00-01h Vender ID 8086h 10-13h Cntrl. Reg. Base Addr. (Mem) 0000h
02-03h Device ID [1] 14-17h Cntrl. Reg. Base Addr. (I/O) 00h
04-05h PCI Command 0000h 18-1Bh Flash Mem. Base Addr. 00h
06-07h PCI Status 0280h 2C-2Dh Subsystem Vender ID
08h Revision ID xxh 2E-2Fh Subsystem ID
09-0Bh Class Code 01h 30-33h Expansion ROM Base Addr.
0Ch Cache Line Size 01h 34h Capabilities Pointer DCh
0Dh Latency Timer 04h 3C-3D Interrupt Line/Pin
0Eh Header Type 00h 3E-3Fh Min Gnt/Max Lat
0Fh BIST 00h DC-E3h Power Mgmt. Functions
NOTE:
Assume unmarked gaps are reserved and/or not used.
[1] iPAQ 1.x = 1229h (Function 0, Device #2); iPAQ 2.0 = 2449h (Function 0, Device # 8).
5.9.4.2 Control
The 82559 controller is controlled though registers that may be mapped in system memory space
or variable I/O space. The registers are listed in the following table:
Table 5–24. NIC Control Registers
Table 5-24.
NIC Control Registers
Offset
Addr. / Register No. of
Bytes
Offset
Addr. / Register No. of
Bytes
00h SCB Status 2 19h Flow Control Register 2
02h SCB Command 2 1Bh PMDR 1
04h SCB General Pointer 4 1Ch General Control 1
08h PORT 4 1Dh General Status 1
0Ch Flash Control Reg. 2 1E-2Fh Reserved 10
0Eh EEPROM Control Reg. 2 30h Function Event Register 4
10h Mgmt. Data I/F Cntrl. Reg. 4 34h Function Event Mask Register 4
14h Rx Direct Mem. Access Byte Cnt. 4 38h Function Present State Register 4
18h Early Receive Interrupt 1 20h Force Event Register 4
Not implemented in these systems (CardBus registers).