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CMX649 Wireless Voice Link Design Guide
©
2004 CML Microcircuits
Page 26 of 42
Port Number
Schematic Name
Function
P3.0
BATT_SENSE
Analog input to 10-bit ADC
P3.1 MICR505_DATAXIO
SPI
port: ‘slave in, master out’
P3.2
MICR505_DATAXIO
SPI port: ‘slave out, master in’
P3.3
MICF505_DATCLK
SPI port; clock input
P3.4 649TXDATA
General
I/O
P3.5 649CSN General
I/O
P3.6 649_505_SCLK
General
I/O
P3.7 649_505_CMD
General
I/O
Table 7, Microcontroller Port 3 Configuration in SET_RF_TX Subroutine
A 750
µ
s pause is inserted to allow the RF transceiver’s PLL to stabilize, after which
time the subroutine ends and control is transferred back to the START_RFTX
subroutine.
5.1.8 RFCHIPTX
An interrupt is issued in transmit mode when a byte of data can be written to the
USART0 transmit buffer. When this interrupt occurs, the firmware vectors to the
RFCHIPTX interrupt service routine (ISR).
The RFCHIPTX ISR first determines if the entire amount of preamble has already
been transmitted. If the preamble transmission isn’t complete, the firmware then
determines if preamble or frame sync words remain to be transmitted. Once this
determination is made, the appropriate byte is loaded into the microcontroller’s
USART0 transmit buffer, and the ISR returns from interrupt. The RFCHIPTX ISR is
illustrated in the following flowchart: