CML Microcircuits CMX649, Примечание к применению

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CMX649 Wireless Voice Link Design Guide
©
2004 CML Microcircuits Page 15 of 42
PORT 2
Port
Number Port Name Description Input or
Output Default
Output
Values
P2.0 ACLK CMX649 xtal/clk input. Output N/A
P2.1 VOL - Signal that decreases volume by decreasing
CMX649 audio output gain. Input N/A
P2.2 CHNL Signal that causes a change in RF channel by
adjusting MICRF505 synthesizer programming. Input N/A
P2.3 649RPLY CMX649 CBUS interface: “reply data” to the
microcontroller. Input N/A
P2.4 649RXCLK CMX649 “burst clock” signal applied to RX CLK
pin. Output low
P2.5 MICR505_CS MICRF505 “chip select” signal. Output low
P2.6 Not present on MSP430F1232
P2.7 Not present on MSP430F1232
PORT 3
Port
Number Port Name Description Input or
Output Default
Output
Values
P3.0 BATT_SENSE Signal corresponding to battery voltage, to be used
with battery recharging circuit (not included in this
design).
Input N/A
P3.1 MICR505_DATAIXO MICRF505 data interface; SPI output line (‘slave in
master out). Output N/A
P3.2 MICR505_DATAIXO MICRF505 data interface; SPI output line (‘slave
out master in’).
Input N/A
P3.3 MICR505_DATACLK MICRF505 data interface; clock input line. Output N/A
P3.4 649TXDATA CMX649 encoded data output. Input N/A
P3.5 649CSN CMX649 CBUS interface: “chip select” line. Output High
P3.6 649_505_SCLK Serial clock signal for both the CMX649 “SCLK”
(CBUS interface) and the MICRF505 “SCLK”
(control interface). Output Low
P3.7 649_505_CMD Command data signal for both the CMX649 “CMD”
(CBUS interface) and the MICRF505 “IO” (control
interface). Output Low
Table 2, Microcontroller Port Mapping
Connector J1 provides connections to the microcontroller’s JTAG interface to allow
the device to be reprogrammed and debugged using the Texas Instruments MSP430
Flash Emulation Tool MSP-FETP430IF (not provided).
4.3.1 Data Buffering Scheme
The general flow of data in this design is summarized in the following diagram:
CMX649
Voice Codec
SPI-Rx RXRF_BUF
SPI-Tx RXTF_BUF
Manchester
Encoding
Manchester
Decoding
83.3kbps 166.6kbps
MSP430F1232
Microcontroller
MICRF505
RF Transceiver
27.7kbps 166.6kbps
Figure 4, Data Processing Flow Path