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CMX649 Wireless Voice Link Design Guide
©
2004 CML Microcircuits
Page 12 of 42
chosen to avoid attenuation of passband energy. The 340kHz Sallen-Key filter
bandwidth used in this design achieves that objective.
The demodulator output is placed on the DATAIXO pin for presentation to the
microcontroller. During reception, the MICRF505 ‘bit synchronizer’ uses a
programmed clock signal to derive a timing signal that is synchronized to the
incoming data. This internal bit synchronizer clock signal must be equal to 16x the
desired bit rate and is expressed mathematically as follows:
kS)
BitSync_cl
(7
XCO
K
BITSYNC_CL
2
Refclk_K x
f
f
−
=
where:
•
f
BITSYNC_CLK
= bit synchronizer clock signal
•
f
XCO
= crystal oscillator frequency
•
Refclk_K = b5-0 of control register 0x07
•
BitSync_clkS = b3-1 of control register 0x06
The resulting signal on the DATACLK pin is derived from this “bit synchronizer” clock
signal and is synchronized to the incoming data stream. The received data on the
DATAIXO pin is sampled by the microcontroller on the rising edge of this DATACLK
signal. A value of 2.667MHz (16 x 166.6kHz) is used for f
BITSYNC_CLK
in this
application.
The receive signal strength indicator (RSSI), while potentially beneficial for some
applications, is not needed in this project and is therefore not used.
4.2.3 Crystal
Oscillator
The MICRF505 crystal oscillator in this design is based on an 8MHz external crystal.
The MICRF505 provides the ability, under software control, to fine-tune the oscillator
frequency by adding internal capacitance to the crystal pins. This feature can be
used as an integral part of a self-calibration procedure, which could be particularly
important if lower tolerance, less expensive crystals are selected for the design. The
ability to adjust crystal frequency by adding on-chip capacitance is utilized in this
project.
4.2.4 Frequency
Synthesizer
The voltage controlled oscillator (VCO) ‘free-running’ frequency is set to 868MHz by
writing 0xCD to control register 0x03 on power up. The VCO gain is approximately
67MHz/volt.
(For the following calculations, the ‘0’-set of frequency synthesizer dividers is
referenced because direct VCO modulation is used in this design. Please review the
MICRF505 data sheet for more information.)
The reference oscillator frequency (e.g. crystal frequency) is divided down to create
the desired RF channel spacing (i.e. “phase detector comparison frequency” in