Cirrus Logic Crystal LAN CS8900A, Лист данных продукта

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76 DS271PP3
CS8900A
Crystal LAN™ ISA Ethernet Controller
CIRRUS LOGIC PRODUCT DATA SHEET
1) A frame is received by the CS8900A, triggering
an enabled interrupt.
2) The host reads the Interrupt Status Queue
(memory base + 0120h) and is informed of the
receive frame.
3) The host reads RxStatus (memory base +
0400h) to learn the status of the receive frame.
4) The host reads RxLength (memory base +
0402h) to learn the frame’s length.
5) The host reads the frame data by executing re-
petitive memory-to-memory move instructions
(REP MOVS) from memory base + 0404h to
transfer the entire frame from CS8900A mem-
ory to host memory.
For a more detailed description of receive, see
Section 5.2 on page 79.
4.9.5 Polling the CS8900A in Memory Mode
If interrupts are not used, the host can poll the
CS8900A to check if receive frames are present
and if memory space is available for transmit.
However, this is beyond the scope of this data
sheet.
4.10 I/O Space Operation
In I/O Mode, PacketPage memory is accessed
through eight 16-bit I/O ports that are mapped into
16 contiguous I/O locations in the host system’s I/O
space. I/O Mode is the default configuration for the
CS8900A and is always enabled. On power up, the
default value of the I/O base address is set at 300h.
(Note that 300h is typically assigned to LAN pe-
ripherals). The I/O base address may be changed to
any available XXX0h location, either by loading
configuration data from the EEPROM, or during
system setup. Table 17 shows the CS8900A I/O
Mode mapping.
4.10.1 Receive/Transmit Data Ports 0 and 1
These two ports are used when transferring trans-
mit data to the CS8900A and receive data from the
CS8900A. Port 0 is used for 16-bit operations and
Ports 0 and 1 are used for 32-bit operations (lower-
order word in Port 0).
4.10.2 TxCMD Port
The host writes the Transmit Command (TxCMD)
to this port at the start of each transmit operation.
The Transmit Command tells the CS8900A that the
host has a frame to be transmitted, as well as how
that frame should be transmitted. This port is
mapped into PacketPage base + 0144h. See Regis-
ter 9 in Section 4.4 on page 47 for more informa-
tion.
4.10.3 TxLength Port
The length of the frame to be transmitted is written
here immediately after the Transmit Command is
written. This port is mapped into PacketPage base
+ 0146h.
4.10.4 Interrupt Status Queue Port
This port contains the current value of the Interrupt
Status Queue (ISQ). The ISQ is located at Pack-
etPage base + 0120h. For a more detailed descrip-
tion of the ISQ, see Section 5.1 on page 79.
4.10.5 PacketPage Pointer Port
The PacketPage Pointer Port is written whenever
the host wishes to access any of the CS8900A’s in-
ternal registers. The first 12 bits (bits 0 through B)
provide the internal address of the target register to
be accessed during the current operation. The next
Offset Type Description
0000h Read/Write Receive/Transmit Data (Port 0)
0002h Read/Write Receive/Transmit Data (Port 1)
Table 17. I/O Mode Mapping
0004h Write-only TxCMD (Transmit Command)
0006h Write-only TxLength (Transmit Length)
0008h Read-only Interrupt Status Queue
000Ah Read/Write PacketPage Pointer
000Ch Read/Write PacketPage Data (Port 0)
000Eh Read/Write PacketPage Data (Port 1)
Offset Type Description
Table 17. I/O Mode Mapping