background image

.

OG_STD-302S-429M_v11e

11

Circuit Design, Inc.

OPERATION GUIDE

PLL IC CONTROL

PLL IC control

OSCin

OSCout

Vp

VCC

Do

GND

Xf in

Fin

R

P

STD-302

Control pin name

ZC

PS

LE

Data

2kohm

MB15E03SL

Reference Oscillator

LPF

Voltage Controled

Oscillator

VCO

PLL

CLK

DATA

LE

LD

LD/f out

+2.8v

#:Control v oltage = +2.8v

21.25MHz

up to 1200MHz

Figure 1

CLK

2kohm

2kohm

2kohm

STD-302S is equipped with an internal PLL frequency synthesizer as shown in Figure 1. The operation of the PLL
circuit enables the VCO to oscillate at a stable frequency. Transmission frequency is set externally by the
controlling IC. STD-302S has control terminals (CLK, LE, DATA) for the PLL IC and the setting data is sent to the
internal register serially via the data line. Also STD-302S has a Lock Detect (LD) terminal that shows the lock

status of the frequency. These signal lines are connected directly to the PLL IC through a 2 kΩ resistor. 

The interface voltage of STD-302S is 2.8 V, so the control voltage must be the same.
STD-302S comes equipped with a Fujitsu MB15E03SL PLL IC. Please refer to the manual of the PLL IC.

The following is a supplementary description related to operation with STD-302S. In this description, the same
names and terminology as in the PLL IC manual are used, so please read the manual beforehand.

Содержание STD-302

Страница 1: ...cal and radio knowledge for setup and operation To ensure proper and safe operation please read this operation guide thoroughly prior to use Please keep this operation guide for future reference CIRCU...

Страница 2: ...CIFICATIONS STD 302S 429 MHz 4 PIN DESCRIPTION 6 BLOCK DIAGRAM 9 DIMENSIONS 10 PLL IC CONTROL 11 PLL IC control 11 How to calculate the setting values for the PLL register 12 Method of serial data inp...

Страница 3: ...gned to meet the basic specifications of Japanese ARIB STD T67 standard however it has not been certified for conformity with the technical regulations Users are required to perform the procedures for...

Страница 4: ...illation type PLL controlled VCO Frequency stability 20 to 60 C ppm 4 4 Reference frequency at 25 C TX RX switching time ms 15 20 DI DO Channel step kHz 12 5 Data rate bps 2400 4800 DO DI Max pulse wi...

Страница 5: ...anging channels Please make sure to optimize the timing The recommended preamble is more than 20 ms Antenna connection is designed as pin connection RF output power sensitivity spurious emission and s...

Страница 6: ...TXSEL I TX select terminal GND TXSEL active To enable the transmitter circuits connect TXSEL to GND and RXSEL to OPEN or 2 8 V RXSEL I RX select terminal GND RXSEL active To enable the receiver circu...

Страница 7: ...g input Interface voltage H 2 8 V L 0 V LD O PLL lock unlock indicator terminal Lock H 2 8 V Unlock L 0 V RSSI O Received Signal Strength Indicator terminal DO O Data output terminal Interface voltage...

Страница 8: ...rmittent communication possible 8 429 2625 9 429 2750 10 429 2875 11 429 3000 12 429 3125 13 429 3250 14 429 3750 15 429 3875 16 429 3625 17 429 3750 18 429 3875 19 429 4000 20 429 4125 21 429 4250 22...

Страница 9: ...OPERATION GUIDE OG_STD 302S 429M_v11e Circuit Design Inc 9 BLOCK DIAGRAM STD 302S 429MHz...

Страница 10: ...OPERATION GUIDE OG_STD 302S 429M_v11e Circuit Design Inc 10 DIMENSIONS...

Страница 11: ...equency is set externally by the controlling IC STD 302S has control terminals CLK LE DATA for the PLL IC and the setting data is sent to the internal register serially via the data line Also STD 302S...

Страница 12: ...4 note fcomp fosc R Also this PLL IC operates with the following R N A and M relational expressions R fosc fcomp Equation 5 N INT n M Equation 6 A n M x N Equation 7 INT integer portion of a division...

Страница 13: ...at this phase The PLL IC which operates as shown in the block diagram in the manual shifts the data to the 19 bit shift register and then transfers it to the respective latch counter register by judgi...

Страница 14: ...n operating in the same channel a new PLL setting is not necessary it can receive data within 5 ms of switching 1 For data transmission if the RF channel to be used for transmission is set while still...

Страница 15: ...el is not changed 5 ms 4 40 ms CPU Power on CH Data 5 5 ms 5 ms Check LD signal Check LD signal Normal status Status immediately after power comes on Channel change No channel change 4 2 Initialize th...

Страница 16: ...614 509 38 18 429 3875 407 6875 407 6875 32615 509 39 19 429 4000 407 7000 407 7000 32616 509 40 20 429 4125 407 7125 407 7125 32617 509 41 21 429 4250 407 7250 407 7250 32618 509 42 22 429 4375 407 7...

Страница 17: ...50 407 9250 32634 509 58 38 429 6375 407 9375 407 9375 32635 509 59 39 429 6500 407 9500 407 9500 32636 509 60 40 429 6625 407 9625 407 9625 32637 509 61 41 429 6750 407 9750 407 9750 32638 509 62 42...

Страница 18: ...he PLL setting control board prepared by Circuit Design TEST DATA RSSI output level characteristic Measurement frequency 429 MHz Modulation unmodulated 25 C 5 C Signal level dBm RSSI mV 130 130 120 17...

Страница 19: ...to the radio module Communication performance will be affected by the surrounding environment so communication tests should be carried out before actual use Ensure that the power supply for the radio...

Страница 20: ...OG_STD 302S 429M_v11e Circuit Design Inc 20 OPERATION GUIDE REVISION HISTORY Version Date Description Remark 1 0 Jan 2015 1 1 Apr 2015 RSSI graph was revised P 18...

Отзывы: