— 22 —
Pin No.
Name
In/Out
Status
Status
Description
of OFF
of ON
10-7. Character generator ROM pin descriptions (HD62063B01)
24
EROUT
Out
6V
5V
VFB capacitor terminal
25
VFB
**
H
3.2V
EROUT signal input
26
MIN
**
5V
3.2V
27
MAX
**
5V
3.2V
28
U/D
In
H
5V
Display contrast control signal (Up/Down)
29
CLOCK
In
L
L
Display contrast clock signal
30
SET
In
H
H
Display contrast data reset signal
31
PDB
In
L
H
Pin No.
Name
In/Out
Status
Status
Description
of OFF
of ON
1,7~12,23
NC
**
**
**
Not used
2
BLD
In
**
**
Not used (Battery voltage detection terminal)
3
VOSC
In
3V
**
Connected capacitor
4,20
GND
In L
L
GND
terminal
5,6
OSI/OSO
In
Pulse
Pulse
External clock terminal (32.768 KHz)
13
TNL
Out
**
**
Not used
14,19
IN1+,IN2+
In
H
H
Connected to VDD
15,32
VSS1,VSS2
In
L
L
GND terminal
16,21
IN1-,IN2-
In
H
H
Connected to VDD
17,22
OUT1,OUT2
Out
**
**
Not used
18
TNH
Out
**
**
Not used
24
IN
In
L
Pulse
Power on key input terminal
25
OUT
Out
H
Pulse
KI0 terminal for power on
26,27
BZ1,2
Out
L
L
Buzzer signal
28
INT
Out
H
H
Interrupt signal for alarm clock (alarm time----"L")
29,30
CEH,CEL
Out
H
Pulse
RAM chip select signal
31
CED
In
H
Pulse
Chip enable signal of CPU
33
EN
In
L
H
Enable signal (Buzzer off-----"L")
34~37
IO3~IO0
In/Out
L
Pulse
Data bus line (IO0~IO3)
38~42
A0~A3,A15
In
L
Pulse
Address bus line (A0~A3,A15)
43
WEB
In
H
Pulse
Write signal
44
CSB
In
H
Pulse
Chip select signal
H
L
L
H
Power
H
H
H
3V
L
L
H
H
H
VDD terminal
Power
Содержание SF-8350
Страница 1: ...SF 8350 LX 572 JUNE 1993 R without price...
Страница 3: ...1 1 SCHEMATIC DIAGRAM 1 1 Main Block...
Страница 4: ...2 1 2 Display Block...
Страница 5: ...3 1 3 Key Matrix...
Страница 14: ...13...
Страница 33: ...32 13 PARTS LIST SF 8350...
Страница 34: ...33...
Страница 35: ...34 14 PCB VIEW SF 8350...
Страница 36: ...35 15 ASSEMBLY VIEW SF 8350...
Страница 37: ...8 11 10 Nishi Shinjuku Shinjuku ku Tokyo 160 Japan Telephone 03 3347 4926...
