PRELIMINARY
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User's Manual (MUT)
Mod. V1729 4 Channel 12 Bit Sampling ADC
22/06/2005
3
2. Operating modes
2.1 Definition of the acquisition window. Trigger modes
2.1.1
Principle, PRETRIG, POSTTRIG
During the acquisition, the analog signal is continuously sampled in the analog memory
which is comparable to a circular buffer with a depth of 2560 points (time depth =
2560/Fe). The stopping of sampling is initiated by the arrival of a trigger signal
Ta
(asynchronous trigger)
which is common to all the channels of a board. This signal is
only authorized to be produced following a programmable time named
PRETRIG
after
the triggering of the acquisition sequence.
The effective stopping of the sampling will occur following a pre-defined number (named
POSTTRIG)
of clock periods (50MHz or 100MHz) after the trigger (see Fig. 2.1).
Fig. 2.1: chronogram of the stopping of the acquisition
The
POSTTRIG
, programmable by the user, permits defining and displacing the position
of the trigger signal in the acquisition window. It is adjustable in the 1/Fp to 65535/Fp
range by steps of 1/Fp ( = 20ns or 10ns). This is illustrated in Fig 2.2.
In the example illustrated by Fig 2.2, the POSTTRIG is fixed at 6/Fp. The acquisition will
be stopped 6/Fp + ti after the arrival of the trigger signal (ti corresponds to the time
measured by the vernier between the Ta and the next rising edge of the clock). The
analog memory will then contain the 2560 last samples (of which only 2520 will be
exploited).
Fig. 2.2: centering of the Trigger in the acquisition window for two POSTTRIG cases
Thus, a POSTTRIG value close to 64 assures the centering of the trigger in the middle of
the acquisition window. For the values of POSTTRIG > 127, the trigger is no longer in the
acquisition window.
1/Fp
Rising Edge of Oscillator
Clock
Ta
ti
Acquisition
Stopping of
acquisition
POSTTRIG : here
= 6/Fp
Ta
Ta
High value of POSTTRIG
Low value of POSTTRIG
Asynchronous trigger
