Document type:
Title:
Revision date:
Revision:
User's Manual (MUT)
Mod. DT5740 32 Channel 12bit - 65MS/s Digitizer
04/05/2016
12
NPO:
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Number of pages:
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00100/09:5740x.MUTx/12
DT5740_REV12.DOC
50
46
7
Firmware and Upgrades
The board hosts one FPGA on the mainboard and two FPGAs on the mezzanine (i.e. one FPGA
per 16 channels or two 8-channel groups). The channel FPGAs firmware is identical. A unique file
is provided that will update all the FPGAs at the same time.
ROC FPGA MAINBOARD FPGA (Readout Cont VME interface):
FPGA Altera Cyclone EP1C20.
AMC FPGA MEZZANINE FPGA (ADC readout/Memory Controller):
FPGA Altera Cyclone EP3C16
x740D AMC FPGA or MEZZANINE FPGA (ADC readout/Memory Controller):
FPGA Altera Cyclone EP3C40
The firmware is stored onto the on-board FLASH memory. Two copies of the firmware are stored
in two different pages of the FLASH, referred to as Standard (STD) and Backup (BKP). In case of
default firmware, the board is usually factory equipped with the same firmware version on both
pages.
At power-on, a microcontroller reads the FLASH memory starting from the STD page and
programs the module automatically loading the first working firmware copy.
It is possible to upgrade the board firmware via USB or Optical Link by writing the FLASH with the
CAENUpgrader software (see § 5.1).
IT IS STRONGLY SUGGESTED TO OPERATE THE DIGITIZER UPON THE STD COPY OF THE FIRMWARE.
UPGRADES ARE SO RECOMMENDED ONLY ON THE STD PAGE OF THE FLASH. THE BKP COPY IS TO BE
INTENDED ONLY FOR RECOVERY USAGE. IF BOTH PAGES RESULT CORRUPTED, THE USER WILL NO
LONGER BE ABLE TO UPLOAD THE FIRMWARE VIA USB OR OPTICAL LINK AGAIN AND THE BOARD NEEDS
TO BE SENT TO CAEN IN REPAIR!
