background image

vi

This page is intentionally left blank.

Содержание PMCCTR32

Страница 1: ...Counter Timer PMC Module Board Revision B Manual Revision A 06 April 2001 This material contains information of proprietary interest to BVM Ltd It has been supplied in confidence and the recipient by...

Страница 2: ...This page is intentionally left blank...

Страница 3: ...provided as Copyright BVM Ltd is proprietary and confidential property of BVM Ltd and each single copy is given on the agreed understanding that it is licensed for use on product combinations supplie...

Страница 4: ...ii This page is intentionally left blank...

Страница 5: ...atus Register 5 3 3 8 Counter Timer Output Control Register 5 3 3 9 Counter Timer Interrupt Enable Register 5 3 3 10 Counter Timer Clock Source Register 5 3 3 11 Direction Register 5 3 3 12 Function R...

Страница 6: ...13 2 Global Output Enable Bit 4 GOPEN 15 7 3 13 3 Internal Watchdog Enable Bit 6 IWDEN 15 7 3 13 4 Watchdog Status Bit 7 WDGST 15 7 3 13 5 Internal Counter Timer Clock De bounce Bit 10 8 INCLK2 0 16 7...

Страница 7: ...Figures Figure Page Figure 1 Board Layout Topside 2 Figure 2 Board Layout Underside 2 Figure 3 Block Diagram 4 Figure 4 Output Circuit 7 Figure 5 Input Circuit 8 Figure 6 Connector Pin outs for 9 pin...

Страница 8: ...vi This page is intentionally left blank...

Страница 9: ...software engineers and end users This User s Manual covers details of the PMCCTR32 only which is one in a range of PMCDIO digital I O and PMCCTR counter timer I O PMC modules from BVM Unless otherwise...

Страница 10: ...PMCCTR32 2 Copyright 2001 BVM Ltd 2 Overview 2 1 Board Layout Figure 1 Board Layout Topside Figure 2 Board Layout Underside...

Страница 11: ...on Control External Gate External Output with Polarity Selection Interrupt on Rollover Watchdog for output enabling Watchdog period programmable 125ms to 2sec Watchdog interrupt Watchdog tri states ou...

Страница 12: ...V2 2 Vital Product Data VPD configuration support PCI Target Programmable Burst Management PCI Target Read Ahead mode PCI Target Delayed Read mode PCI Target Delayed Write mode Programmable Interrupt...

Страница 13: ...Direction Override Register An 8 bit Counter Timer Direction Override Register where each bit is OR ed with the corresponding direction input pin for the respective Counter Timer 3 3 7 Counter Timer S...

Страница 14: ...17 Counter Timer Value Registers A 16 bit Counter Timer Value Register for each Counter Timer which can be used to set the count value and read to return the current count value on the fly 3 4 Counte...

Страница 15: ...delays the turn on of Q4 allowing for a short surge current to be provided The voltage across Q1 increases as the load current increases At 100mA load the voltage drop is about 2 5V giving a power dis...

Страница 16: ...rcuit but are still present on the input circuit due to commonality of build options 3 6 93CS56 EEPROM The PMCCTR32 is fitted with a 93CS56 EEPROM which is supplied pre programmed by BVM The contents...

Страница 17: ...nel 3 The PMC module should be fixed to the host carrier using four M2 5 x 6mm pan head screws into the four fixing holes provided two on the front panel and two on the spacers 4 There is no voltage k...

Страница 18: ...TE4 43 10 CTOUT4 P2 6 P6 6 CTGTE4 44 11 CTOUT5 P2 2 P6 2 CTGTE5 45 12 CTOUT5 P2 7 P6 7 CTGTE5 46 13 CTOUT6 P2 3 P6 3 CTGTE6 47 14 CTOUT6 P2 8 P6 8 CTGTE6 48 15 CTOUT7 P2 4 P6 4 CTGTE7 49 16 CTOUT7 P2...

Страница 19: ...CTGTE7 30 31 CTOUT7 CTGTE7 32 33 CTCLK0 CTDIR0 34 35 CTCLK0 CTDIR0 36 37 CTCLK1 CTDIR1 38 39 CTCLK1 CTDIR1 40 41 CTCLK2 CTDIR2 42 43 CTCLK2 CTDIR2 44 45 CTCLK3 CTDIR3 46 47 CTCLK3 CTDIR3 48 49 CTCLK4...

Страница 20: ...AD 29 20 21 AD 28 AD 27 22 21 Ground AD 26 22 23 AD 25 Ground 24 23 AD 24 3 3V 24 25 Ground C BE 3 26 25 IDSEL AD 23 26 27 AD 22 AD 21 28 27 3 3V AD 20 28 29 AD 19 5V 30 29 AD 18 Ground 30 31 V I O AD...

Страница 21: ...ter R W 8 00B Counter Timer Dir Override Register R W 8 00F 00C Reserved reads 0 R 010 Counter Timer Status Register R W 8 011 Counter Timer Output Control Register R W 8 012 Counter Timer Interrupt E...

Страница 22: ...Timer Direction Override Register below 7 3 5 Counter Timer Gate Override Register The 8 bit read write Counter Timer Gate Override Register where each bit corresponds to an individual Counter Timer...

Страница 23: ...tatus Control Register The 16 bit read write Status Control Register is used to control a number of the module functions as described below Reserved bits RSVD read as zero and should be written as zer...

Страница 24: ...when the watchdog function is enabled in the Status Control Register see section 7 3 13 Status Control Register on page 15 7 3 15 Watchdog Timer Register The 8 bit read write Watchdog Timer Register...

Страница 25: ...PCI INTA is generated when a Counter Timer Output goes active after being enabled or a watchdog time out occurs after the watchdog is enabled The interrupt will be removed when the Counter Timer Outpu...

Страница 26: ...Output Control Register Counter Timer Interrupt Enable Register Counter Timer Clock Source Register Direction Register Function Register Status Control Register Watchdog Trigger Register Watchdog Tim...

Страница 27: ...plxtech com A 2 Spartan XL FPGA Spartan and SpartanXL Families Field Programmable Gate Arrays DS060 V1 5 March 2 2000 http www xilinx com A 3 Si4946EY Dual N Channel MOSFET Vishay Siliconix Si4946EY...

Отзывы: