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User Guide
30
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For two slots per channel configuration, the server board requires DDR3 DIMMs
within a channel to be populated starting with the DIMM farthest from the processor.
See below figure
“Channel Slots Configuration” on page 30 .
Figure 13: Channel Slots Configuration
The Independent Channel Mode is the default Maximum Performance Mode preferred
for
Intel
®
Xeon
®
5500 processor series based platforms. You can populate all two channels
in
any order and have no matching requirements. All channels must run at the same
interface frequency, but individual channels may run at different DIMM timings (RAS
latency, CAS latency, and so forth).
Memory Sparing and Mirroring
The spare mode is not supported by the Intel
®
Server Board S5500BC.
With memory
mirroring, the system maintains two copies of all data in the memory subsystem. If a
DIMM fails, the data is not lost because the second copy of the data is available from
the mirrored DIMM in the opposite channel. The system will not fail due to memory
error unless both the primary and the mirrored copy of the data become corrupt at the
same time.
In a mirrored system, the maximum usable memory is one-half of the installed memory
with a minimum of two DIMMs installed. Since the data is duplicated across DIMMs,
it means that up to one-half of the installed DIMMs are actively in use at any one time.
The
remaining DIMMs are used for mirroring.
BMC Controller
T
he Integrated Baseboard Management Controller (Integrated BMC) is a highly
integrated single-chip solution, incorporating several devices typically found on
servers. The Integrated BMC on the Intel® Server Board S5500BC contains the
following integrated functionality subsystem: