31
MAINTENANCE AND CALIBRATION
Drive Level Adjustment
Set Level to 0 V and watch on the scope to see that the output level has dropped to less than 5 V. Turn
the power off and switch the Polarity switch to POSITIVE.
Turn the power back on and set Trigger to 1 kHz Internal Trigger, set Width to 500 ns, and set Level to
300 V.
Using the DVM, measure the voltage between TP-2 and TP-6 on the Output board (PCB 202H-1). This is
the voltage directly across the high voltage power supply, PS1. Compare this reading to the level of the
output pulse top shown on the scope. Adjust the FET drive signal with C76 (located in the center of the
floating island on the Output board) so that the amplitude of the output pulse just stops increasing. This
minimizes the power dissipation in the FET. There should be less than 40 V difference between the two
levels (representing the drop across the FET and the 1.5 ohms resistor, R14).
If necessary, recalibrate the output pulse amplitude as described above.
Minimum Pulse Width Calibration
Change Width to 15 ns. Verify that the width for a +300 V pulse is 15 ns at the 50% amplitude points. If
necessary, a very small correction in width can be made by adjusting C76 on the Output board (PCB
202H-1).
Set Level to 0 V and watch on the scope to see that the output level has dropped to less than 5 V. Turn
the power off and switch the Polarity switch to NEGATIVE.
Turn the power back on and set Trigger to 1 kHz Internal Trigger, set Width to 15 ns, and set Level to
300 V. Adjust the drive signal with C78 on the Output board near Q21 so that the width for a -300 V pulse
is 15 ns at the 50% amplitude points. Note that if C78 is adjusted to the end of its range, the output pulse
will disappear.
