Index
BitFlow, Inc.
QTABS_LOADED_STATUS CYT-3-24
QTABS_USED_STATUS CYT-3-17
QUAD_COMPLETE_TIMEOUT CYT-3-10
QUAD_DROPPED CYT-3-20
QUAD_FIFO_OVERFLOW CYT-3-28
QUAD_NUM_MISMATCH CYT-3-28
QUAD_TIMEOUT_DETECTED CYT-3-28
QUADS_LOADED_STATUS CYT-3-22
QUADS_USED_STATUS CYT-3-15
R
R/W CYT-P-4
RD_BOX_IN_DIF CYT-7-3
RD_BOX_IN_OPTO CYT-7-5
RD_BOX_IN_TTL CYT-7-3
RD_BUTTON CYT-7-8
RD_CXP_IO_IN CYT-7-8
RD_CXP_IO_OUT CYT-7-5
RD_CXP_TRIG_IN CYT-7-8
RD_CXP_TRIG_OUT CYT-7-5
RD_ENCA_DIF CYT-7-7
RD_ENCA_SELECTED CYT-7-9
RD_ENCA_SW CYT-7-7
RD_ENCA_TTL CYT-7-7
RD_ENCA_VFG0 CYT-7-7
RD_ENCB_DIF CYT-7-8
RD_ENCB_SELECTED CYT-7-8
RD_ENCB_SW CYT-7-8
RD_ENCB_TTL CYT-7-7
RD_ENCB_VFG0 CYT-7-8
RD_ON_EMPTY CYT-3-20
RD_SCAN_STEP CYT-7-7
RD_SW_TRIG CYT-7-7
RD_TRIG_DIF CYT-7-7
RD_TRIG_SELECTED CYT-7-9
RD_TRIG_TTL CYT-7-7
RD_TRIG_VFG0 CYT-7-7
RO CYT-P-4
S
SCAN_STEP CYT-5-13
SCAN_STEP_TRIG CYT-5-8
SEL_BOX_OUT_DIF CYT-7-17
SEL_BOX_OUT_OPTO CYT-7-17
SEL_BOX_OUT_TTL CYT-7-17
SEL_CC1 CYT-7-13
SEL_CC2 CYT-7-13
SEL_CC3 CYT-7-16
SEL_CC4 CYT-7-16
SEL_ENCA CYT-7-11
SEL_ENCB CYT-7-12
SEL_LED CYT-7-14
SEL_TRIG CYT-7-11
SF_CON CYT-2-46
SF_DIM CYT-2-44
SF_HEIGHT CYT-2-45
SF_INC_X CYT-2-48
SF_INC_Y CYT-2-48
SF_INC_Z CYT-2-48
SF_INIT_BYTE CYT-2-47
SF_LINE_SCAN CYT-2-47
SF_MODE CYT-2-47
SF_RUN_LEVEL CYT-2-47
SF_STATE CYT-2-47
SF_WIDTH CYT-2-45
SF_X_GAP CYT-2-47
SF_Y_GAP CYT-2-48
SF_Z_GAP CYT-2-48
SIZE_ERROR_LSB CYT-3-27
SIZE_ERROR_MSB CYT-3-27
SOF_ERR CYT-8-195
SOL_ERR CYT-8-195
SRC_TAG_ERR CYT-8-195
STREAM_SEL CYT-2-13
STRM_DECODE_STATE CYT-8-195
SW CYT-3-12
SW_ENCA CYT-7-3
SW_ENCB CYT-7-3
SW_TRIG CYT-7-3
Switches CYT-10-3
T
The Stream Sync DMA Engine CYT-1-7
The Timing Sequencer Signal Generator CYT-
1-7
Timing Sequencer CYT-4-1
Trigger CYT-9-2
TRIGPOL CYT-7-17
TS CYT-4-1
TS_CONDITION CYT-4-10
TS_CONTROL CYT-4-3
TS_COUNT CYT-4-9
TS_CT0_DEFAULT_STATE CYT-4-4
TS_CT1_DEFAULT_STATE CYT-4-4
TS_CT2_DEFAULT_STATE CYT-4-4
TS_CT3_DEFAULT_STATE CYT-4-4
TS_END_OF_SEQUENCE CYT-4-10
Содержание Cyton-CXP
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