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4. Theory of Operation
4-42
The computer board contains a CPU, memory, system software stored in EPROM, and
two (2) Field Programmable Gate Arrays (FPGA’s) containing logic for display control, 8
channel 10 bit ADC, valve control, pump motor control, keyboard scan, fault monitoring,
watchdog, and serial interface.
The CPU
is a 16 bit microcontroller. This device contains a number of on board
peripherals that are utilized as follows:
The 8 channel 10 bit ADC
measures: input thermopile voltage, output
thermopile voltage, input and output ambient temperatures, pressure, 30V supply
voltage, diversion valve current, and thermopile reference.
2 pulse width modulators: valve energy and spare.
7 hardware interrupts: power module, display, valve positions (open, middle,
close), door position, and spare.
4 input capture timers: only two (2) are used for fluid out detector and air
detector.
5 output timers: only one (1) is used: sound beep
1 RS232 logic port
1 serial interface port: communicate with power module
7 programmable chip selects: EPROM, Real Time Clock (RTC), RAM word, RAM
lower byte, RAM upper byte, display FPGA, and motor FPGA.
The board contains three types of memory, EPROM, RAM and battery backed up
RAM. The EPROM is used to boot the system on power up, and to store the
main program when the power is off. The system RAM is used for running the
program and temporary constant storage. The battery backup RAM is used for
storing calibration constants that are generated during the system calibration.
The battery backed up memory also contains a real time clock and watchdog.
These constants are compared with the ones stored on the power module to
ensure calibration accuracy. If the daughter board is disconnected from the
computer board, or if either of the temperature probe assemblies is removed, the
memory will be erased, thereby forcing re-calibration. This is a safety feature,
since remove the daughter board or the temperatures probes, resulting in
alignment change. A jumper can be installed to bypass this function during
calibration and troubleshooting.
The display FPGA performs two (2) main functions. The first function is the
interfacing of the computer to the display through an independent memory. The
second function is to provide a locking method for the battery backed up RAM so
that it cannot be modified accidentally.