2. Pin Descriptions
Pin Name
Description
Pin Name
Description
OE
Bus Switch Enable
A
Bus A
S1, S2
Select Input
B1–B3
Bus B
3. Truth Table
S1
S2
Function
H
L
A = B2
L
L
Disconnect
H
H
A = B3
L
H
A = B1
3.5.7 function introduction to HEF4094B
1. DESCRIPTION
The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing
data from the serial input to parallel buffered 3-state outputs O
0
to O
7
. The parallel outputs may be connected
directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage
is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at
the outputs whenever the output enable (EO) signal is HIGH. Two serial outputs (O
s
and O’
s
) are available for
cascading a number of HEF4094B devices. Data is available at O
s
on positive-going clock edges to allow
high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information is
available at O’
s
on the next negative-going clock edge and provides cascading HEF4094B devices when the clock
rise time is slow.
2. FUNCTION TABLE
INPUTS
PARALLEL OUTPUTS
SERIAL OUTPUTS
CP
EO
STR
D
O0
On
Os
O’
s
L
X
X
Z
Z
O’
6
nc
L
X
X
Z
Z
nc
O7
H
L
X
nc
nc
O’
6
nc
H
H
L
L
On-1
O’
6
nc
H
H
H
H
On-1
O’
6
nc
H
H
H
nc
nc
nc
O7
Notes:
1. H = HIGH state (the more positive voltage)
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