121
XIN
Analog Input
Crystal Oscillator Input
120
XOUT
Analog Output
Crystal Oscillator Output
56
GPIO_P24/PWMD3
Output
Software protection control signal jack
57
GPIO_P25/PWMD4
Output
Standby control output end
70
PWMD2
Output
NC
71
PWMD1
Output
NC
100
INT_OUT
Output
NC
34, 115
CVBSO1/CVBSO2
Output
Analog Composite Output for TV CVBS1/CVBS2
109
MCUSEL
Input
Embedded MCU selection. 0: MCU on. 1: MCU off.
6, 21
AVDD_ADC
2.5V Power
ADC Power
35
AVDD_GMC
5V Power
GMC Power
37
AVDD_PWM
5V Power
PWM Power
113
AVDD_OPLL
2.5V Power
OPLL Power
117
AVDD_CDAC
2.5V Power
Current DAC Power
118
AVDD_XTAL
5V Power
XTAL Power
127
AVDD_MPLL
2.5V Power
MPLL Power
50, 110
VDDC
2.5V Power
Digital Core Power
46, 82
VDDP
3.3V/5V Power
Digital Input/Output Power
1, 36, 45,
51, 69, 81,
111, 112,
114, 119,
126, 128
GND
Ground
Ground
3.5.4 function introduction to CD4052
1. Description
The CD4052B (u107) analog multiplexers is digitally-controlled analog switches having low ON
impedance and very low OFF leakage current. Control of analog signals up to 20VP-P can be achieved by
digital signal amplitudes of 4.5V to 20V (if VDD-VSS = 3V, a VDD-VEE of up to 13V can be controlled; for
VDD-VEE level differences above 13V, a VDD-VSS of at least 4.5V is required). For example, if VDD = +4.5V,
VSS = 0V, and VEE = -13.5V, analog signals from -13.5V to +4.5V can be controlled by digital inputs of 0V to
5V. These multiplexer circuits dissipate extremely low quiescent power over the full VDD-VSS and VDD-VEE
supply-voltage ranges, independent of the logic state of the control signals. When a logic “1” is present at the
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