Barco GRAPHICS 1209S, Руководство по обслуживанию

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Date: 10/02/97 R762745
QUAD Comb_Filter R762745
11
The two output signals of the 4-channel Analog Multi-/Demultiplexer IC18, respectively
Chr_Sw and Y_Sw, are the supply signals for the Decoder IC's.
Next, the composite video is split into luminance and chrominance. This split depends
on the colour system.
For PAL and NTSC 3.58 this is done by an adaptive digital comb filter. For SECAM this
is done by passive filtering (like in the former decoder). For NTSC4 digital bandpass and
band reject filters are used.
The chrominance is now applied to the decoder IC in order to furnish the colour
difference signals -(R-Y) and -(B-Y).
These signals are then applied to the "baseband delay line" IC to add the chroma
information of two subsequent lines.
However, when it is NTSC3.58 the digital comb filter has already done a similar action,
this delay line IC is bypassed for NTSC3.58.
The CTI IC is supplied in any case with the colour difference signals and the luminance.
The same CTI chip is also responsible for the luminance delay in order to correct the
phase difference between the two signals amongst others due to the color decoding
process.
Finally, the luminance passes a "sharpness control" and the three signals leave the
decoder via current sources.
Technical description
The bloc schematic shows that the sync processor has three inputs : VID IN, C IN
and Y IN.
There are two PLL's in the IC. The first one generates a stable B urst G ate P ulse. The
second one generates a sampling frequency of 4 x Fsc (4 times the colour subcarrier)
required by the digital comb filter IC.
Note that the colour subcarrier is 3.58Mhz in NTSC3 and 4.43Mhz in PAL. The required
frequencies are consequently :
For NTSC : 4 x 3.58Mhz = 14.318 Mhz ( VCO1 in the bloc diagram)
For PAL : 4 x 4.43Mhz = 17.734 Mhz (VCO2 in the bloc diagram).
In order to generate these stable frequencies the second PLL is used. This PLL
consists of an APC (Automatic Phase Control), a VCO (Voltage Controlled Oscillator)
and a divider by 4 (1/4).
The APC receives the oscillator frequency divided by 4 , and, the burst which must be
gated out of the chrominance. Therefore, very stable burst gate pulses " BGP " are
generated by the aid of the first PLL running at approximately 32 x Fh (32 times the
line frequency) or approx. 500khz.
The BGP pulses, besides internal use in the sync processor itself, are also used by
the comb filter (pin 17).
The reference frequency for the first PLL is provided by the ceramic filter KF100
connected at pin 5.
The videosignal first passes a " sync separator " which is further used in the IC itself
to lock the first PLL (500khz).
Pin 10 accepts information concerning the colour system to the sync processor. The
colour decoder IC 11 delivers this information. This pin is at a high level in NTSC3.58
and low level for PAL and NTSC4.43.
Sync Processor CXA1686M.